Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
Simon Glass | 691d719 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 8 | #include <init.h> |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 9 | #include <dm/lists.h> |
| 10 | #include <dm/device-internal.h> |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 11 | #include <dm/root.h> |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 12 | #include <clk.h> |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 13 | #include <errno.h> |
| 14 | #include <timer.h> |
Simon Glass | 61b29b8 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 15 | #include <linux/err.h> |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 16 | |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 19 | /* |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 20 | * Implement a timer uclass to work with lib/time.c. The timer is usually |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 21 | * a 32/64 bits free-running up counter. The get_rate() method is used to get |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 22 | * the input clock frequency of the timer. The get_count() method is used |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 23 | * to get the current 64 bits count value. If the hardware is counting down, |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 24 | * the value should be inversed inside the method. There may be no real |
| 25 | * tick, and no timer interrupt. |
| 26 | */ |
| 27 | |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 28 | int notrace timer_get_count(struct udevice *dev, u64 *count) |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 29 | { |
| 30 | const struct timer_ops *ops = device_get_ops(dev); |
| 31 | |
| 32 | if (!ops->get_count) |
| 33 | return -ENOSYS; |
| 34 | |
| 35 | return ops->get_count(dev, count); |
| 36 | } |
| 37 | |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 38 | unsigned long notrace timer_get_rate(struct udevice *dev) |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 39 | { |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 40 | struct timer_dev_priv *uc_priv = dev->uclass_priv; |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 41 | |
| 42 | return uc_priv->clock_rate; |
| 43 | } |
| 44 | |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 45 | static int timer_pre_probe(struct udevice *dev) |
| 46 | { |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 47 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 48 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 49 | struct clk timer_clk; |
| 50 | int err; |
| 51 | ulong ret; |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 52 | |
Bin Meng | 7efb4a6 | 2019-07-05 09:23:15 -0700 | [diff] [blame] | 53 | /* It is possible that a timer device has a null ofnode */ |
| 54 | if (!dev_of_valid(dev)) |
| 55 | return 0; |
| 56 | |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 57 | err = clk_get_by_index(dev, 0, &timer_clk); |
| 58 | if (!err) { |
| 59 | ret = clk_get_rate(&timer_clk); |
| 60 | if (IS_ERR_VALUE(ret)) |
| 61 | return ret; |
| 62 | uc_priv->clock_rate = ret; |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 63 | } else { |
| 64 | uc_priv->clock_rate = |
| 65 | dev_read_u32_default(dev, "clock-frequency", 0); |
| 66 | } |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 67 | #endif |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 68 | |
| 69 | return 0; |
| 70 | } |
| 71 | |
Stephen Warren | 0a7edce | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 72 | static int timer_post_probe(struct udevice *dev) |
| 73 | { |
| 74 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
| 75 | |
| 76 | if (!uc_priv->clock_rate) |
| 77 | return -EINVAL; |
| 78 | |
| 79 | return 0; |
| 80 | } |
| 81 | |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 82 | u64 timer_conv_64(u32 count) |
| 83 | { |
| 84 | /* increment tbh if tbl has rolled over */ |
| 85 | if (count < gd->timebase_l) |
| 86 | gd->timebase_h++; |
| 87 | gd->timebase_l = count; |
| 88 | return ((u64)gd->timebase_h << 32) | gd->timebase_l; |
| 89 | } |
| 90 | |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 91 | int notrace dm_timer_init(void) |
| 92 | { |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 93 | struct udevice *dev = NULL; |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 94 | __maybe_unused ofnode node; |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 95 | int ret; |
| 96 | |
| 97 | if (gd->timer) |
| 98 | return 0; |
| 99 | |
Philipp Tomsich | af82315 | 2017-09-11 22:04:11 +0200 | [diff] [blame] | 100 | /* |
| 101 | * Directly access gd->dm_root to suppress error messages, if the |
| 102 | * virtual root driver does not yet exist. |
| 103 | */ |
| 104 | if (gd->dm_root == NULL) |
| 105 | return -EAGAIN; |
| 106 | |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 107 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 108 | /* Check for a chosen timer to be used for tick */ |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 109 | node = ofnode_get_chosen_node("tick-timer"); |
| 110 | |
| 111 | if (ofnode_valid(node) && |
| 112 | uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { |
| 113 | /* |
| 114 | * If the timer is not marked to be bound before |
| 115 | * relocation, bind it anyway. |
| 116 | */ |
Bin Meng | 8d773c4 | 2018-10-10 22:06:58 -0700 | [diff] [blame] | 117 | if (!lists_bind_fdt(dm_root(), node, &dev, false)) { |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 118 | ret = device_probe(dev); |
| 119 | if (ret) |
| 120 | return ret; |
| 121 | } |
| 122 | } |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 123 | #endif |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 124 | |
| 125 | if (!dev) { |
| 126 | /* Fall back to the first available timer */ |
Simon Glass | 3f603cb | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 127 | ret = uclass_first_device_err(UCLASS_TIMER, &dev); |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 128 | if (ret) |
| 129 | return ret; |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | if (dev) { |
| 133 | gd->timer = dev; |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | return -ENODEV; |
| 138 | } |
| 139 | |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 140 | UCLASS_DRIVER(timer) = { |
| 141 | .id = UCLASS_TIMER, |
| 142 | .name = "timer", |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 143 | .pre_probe = timer_pre_probe, |
Mugunthan V N | a5d8011 | 2015-12-24 16:08:06 +0530 | [diff] [blame] | 144 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
Stephen Warren | 0a7edce | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 145 | .post_probe = timer_post_probe, |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 146 | .per_device_auto_alloc_size = sizeof(struct timer_dev_priv), |
| 147 | }; |