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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chouc8a7ba92015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08004 */
5
6#include <common.h>
7#include <dm.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +05308#include <dm/lists.h>
9#include <dm/device-internal.h>
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020010#include <dm/root.h>
Zakharov Vlada5acafb2016-12-09 17:18:32 +030011#include <clk.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080012#include <errno.h>
13#include <timer.h>
Simon Glass61b29b82020-02-03 07:36:15 -070014#include <linux/err.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080015
Bin Meng579eb5a2015-11-13 00:11:15 -080016DECLARE_GLOBAL_DATA_PTR;
17
Thomas Chouc8a7ba92015-10-09 13:46:34 +080018/*
Bin Meng435ae762015-11-13 00:11:14 -080019 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Meng9ca07eb2015-11-24 13:31:17 -070020 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Chouc8a7ba92015-10-09 13:46:34 +080021 * the input clock frequency of the timer. The get_count() method is used
Bin Meng9ca07eb2015-11-24 13:31:17 -070022 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Chouc8a7ba92015-10-09 13:46:34 +080023 * the value should be inversed inside the method. There may be no real
24 * tick, and no timer interrupt.
25 */
26
Simon Glass4f051822016-02-24 09:14:48 -070027int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080028{
29 const struct timer_ops *ops = device_get_ops(dev);
30
31 if (!ops->get_count)
32 return -ENOSYS;
33
34 return ops->get_count(dev, count);
35}
36
Simon Glass4f051822016-02-24 09:14:48 -070037unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080038{
Simon Glass4f051822016-02-24 09:14:48 -070039 struct timer_dev_priv *uc_priv = dev->uclass_priv;
Thomas Chouc8a7ba92015-10-09 13:46:34 +080040
41 return uc_priv->clock_rate;
42}
43
Bin Meng579eb5a2015-11-13 00:11:15 -080044static int timer_pre_probe(struct udevice *dev)
45{
Philipp Tomsichb1a16002017-07-28 17:19:58 +020046#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Bin Meng579eb5a2015-11-13 00:11:15 -080047 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Zakharov Vlada5acafb2016-12-09 17:18:32 +030048 struct clk timer_clk;
49 int err;
50 ulong ret;
Bin Meng579eb5a2015-11-13 00:11:15 -080051
Bin Meng7efb4a62019-07-05 09:23:15 -070052 /* It is possible that a timer device has a null ofnode */
53 if (!dev_of_valid(dev))
54 return 0;
55
Zakharov Vlada5acafb2016-12-09 17:18:32 +030056 err = clk_get_by_index(dev, 0, &timer_clk);
57 if (!err) {
58 ret = clk_get_rate(&timer_clk);
59 if (IS_ERR_VALUE(ret))
60 return ret;
61 uc_priv->clock_rate = ret;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020062 } else {
63 uc_priv->clock_rate =
64 dev_read_u32_default(dev, "clock-frequency", 0);
65 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +020066#endif
Bin Meng579eb5a2015-11-13 00:11:15 -080067
68 return 0;
69}
70
Stephen Warren0a7edce2016-01-06 10:33:03 -070071static int timer_post_probe(struct udevice *dev)
72{
73 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
74
75 if (!uc_priv->clock_rate)
76 return -EINVAL;
77
78 return 0;
79}
80
Bin Meng9ca07eb2015-11-24 13:31:17 -070081u64 timer_conv_64(u32 count)
82{
83 /* increment tbh if tbl has rolled over */
84 if (count < gd->timebase_l)
85 gd->timebase_h++;
86 gd->timebase_l = count;
87 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
88}
89
Mugunthan V Nc8336972016-01-16 21:33:58 +053090int notrace dm_timer_init(void)
91{
Mugunthan V Nc8336972016-01-16 21:33:58 +053092 struct udevice *dev = NULL;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020093 __maybe_unused ofnode node;
Mugunthan V Nc8336972016-01-16 21:33:58 +053094 int ret;
95
96 if (gd->timer)
97 return 0;
98
Philipp Tomsichaf823152017-09-11 22:04:11 +020099 /*
100 * Directly access gd->dm_root to suppress error messages, if the
101 * virtual root driver does not yet exist.
102 */
103 if (gd->dm_root == NULL)
104 return -EAGAIN;
105
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200106#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Mugunthan V Nc8336972016-01-16 21:33:58 +0530107 /* Check for a chosen timer to be used for tick */
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200108 node = ofnode_get_chosen_node("tick-timer");
109
110 if (ofnode_valid(node) &&
111 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
112 /*
113 * If the timer is not marked to be bound before
114 * relocation, bind it anyway.
115 */
Bin Meng8d773c42018-10-10 22:06:58 -0700116 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200117 ret = device_probe(dev);
118 if (ret)
119 return ret;
120 }
121 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200122#endif
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200123
124 if (!dev) {
125 /* Fall back to the first available timer */
Simon Glass3f603cb2016-02-11 13:23:26 -0700126 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V Nc8336972016-01-16 21:33:58 +0530127 if (ret)
128 return ret;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530129 }
130
131 if (dev) {
132 gd->timer = dev;
133 return 0;
134 }
135
136 return -ENODEV;
137}
138
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800139UCLASS_DRIVER(timer) = {
140 .id = UCLASS_TIMER,
141 .name = "timer",
Bin Meng579eb5a2015-11-13 00:11:15 -0800142 .pre_probe = timer_pre_probe,
Mugunthan V Na5d80112015-12-24 16:08:06 +0530143 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren0a7edce2016-01-06 10:33:03 -0700144 .post_probe = timer_post_probe,
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800145 .per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
146};