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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassd3b7ff12015-03-05 12:25:34 -07002/*
3 * Copyright (C) 2015 Google, Inc
Simon Glassd3b7ff12015-03-05 12:25:34 -07004 */
5
6#include <common.h>
7#include <dm.h>
8#include <asm/io.h>
Bin Meng3839b4e2018-08-03 01:14:42 -07009#include <asm/test.h>
Simon Glassd3b7ff12015-03-05 12:25:34 -070010#include <dm/test.h>
Joe Hershbergere721b882015-05-20 14:27:27 -050011#include <test/ut.h>
Simon Glassd3b7ff12015-03-05 12:25:34 -070012
13/* Test that sandbox PCI works correctly */
Joe Hershbergere721b882015-05-20 14:27:27 -050014static int dm_test_pci_base(struct unit_test_state *uts)
Simon Glassd3b7ff12015-03-05 12:25:34 -070015{
16 struct udevice *bus;
17
18 ut_assertok(uclass_get_device(UCLASS_PCI, 0, &bus));
19
20 return 0;
21}
22DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
23
Bin Meng2db7f2b2018-08-03 01:14:39 -070024/* Test that sandbox PCI bus numbering and device works correctly */
25static int dm_test_pci_busdev(struct unit_test_state *uts)
Simon Glass2bb02e42015-05-10 21:08:06 -060026{
27 struct udevice *bus;
Bin Meng3839b4e2018-08-03 01:14:42 -070028 struct udevice *swap;
29 u16 vendor, device;
Simon Glass2bb02e42015-05-10 21:08:06 -060030
Bin Mengdee4d752018-08-03 01:14:41 -070031 /* Test bus#0 and its devices */
Simon Glass2bb02e42015-05-10 21:08:06 -060032 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
33
Bin Meng2db7f2b2018-08-03 01:14:39 -070034 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
Bin Meng3839b4e2018-08-03 01:14:42 -070035 vendor = 0;
36 ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
37 ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
Bin Meng2db7f2b2018-08-03 01:14:39 -070038 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
Bin Meng3839b4e2018-08-03 01:14:42 -070039 device = 0;
40 ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
Simon Glass34145812019-09-25 08:56:01 -060041 ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
Bin Meng2db7f2b2018-08-03 01:14:39 -070042
Bin Mengdee4d752018-08-03 01:14:41 -070043 /* Test bus#1 and its devices */
44 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
45
Bin Mengdee4d752018-08-03 01:14:41 -070046 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
Bin Meng3839b4e2018-08-03 01:14:42 -070047 vendor = 0;
48 ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
49 ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
Bin Mengdee4d752018-08-03 01:14:41 -070050 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
Bin Meng3839b4e2018-08-03 01:14:42 -070051 device = 0;
52 ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
Simon Glass34145812019-09-25 08:56:01 -060053 ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
Bin Mengdee4d752018-08-03 01:14:41 -070054
Simon Glass2bb02e42015-05-10 21:08:06 -060055 return 0;
56}
Bin Meng2db7f2b2018-08-03 01:14:39 -070057DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Simon Glass2bb02e42015-05-10 21:08:06 -060058
Simon Glassd3b7ff12015-03-05 12:25:34 -070059/* Test that we can use the swapcase device correctly */
Joe Hershbergere721b882015-05-20 14:27:27 -050060static int dm_test_pci_swapcase(struct unit_test_state *uts)
Simon Glassd3b7ff12015-03-05 12:25:34 -070061{
Bin Mengdd4808f2018-08-03 01:14:38 -070062 struct udevice *swap;
Simon Glassd3b7ff12015-03-05 12:25:34 -070063 ulong io_addr, mem_addr;
64 char *ptr;
65
Bin Meng2db7f2b2018-08-03 01:14:39 -070066 /* Check that asking for the device 0 automatically fires up PCI */
67 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
68
69 /* First test I/O */
70 io_addr = dm_pci_read_bar32(swap, 0);
71 outb(2, io_addr);
72 ut_asserteq(2, inb(io_addr));
73
74 /*
75 * Now test memory mapping - note we must unmap and remap to cause
76 * the swapcase emulation to see our data and response.
77 */
78 mem_addr = dm_pci_read_bar32(swap, 1);
79 ptr = map_sysmem(mem_addr, 20);
80 strcpy(ptr, "This is a TesT");
81 unmap_sysmem(ptr);
82
83 ptr = map_sysmem(mem_addr, 20);
84 ut_asserteq_str("tHIS IS A tESt", ptr);
85 unmap_sysmem(ptr);
86
87 /* Check that asking for the device 1 automatically fires up PCI */
Simon Glassc0322412015-11-29 13:18:02 -070088 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
Simon Glassd3b7ff12015-03-05 12:25:34 -070089
90 /* First test I/O */
Simon Glassc0322412015-11-29 13:18:02 -070091 io_addr = dm_pci_read_bar32(swap, 0);
Simon Glassd3b7ff12015-03-05 12:25:34 -070092 outb(2, io_addr);
93 ut_asserteq(2, inb(io_addr));
94
95 /*
96 * Now test memory mapping - note we must unmap and remap to cause
97 * the swapcase emulation to see our data and response.
98 */
Simon Glassc0322412015-11-29 13:18:02 -070099 mem_addr = dm_pci_read_bar32(swap, 1);
Simon Glassd3b7ff12015-03-05 12:25:34 -0700100 ptr = map_sysmem(mem_addr, 20);
101 strcpy(ptr, "This is a TesT");
102 unmap_sysmem(ptr);
103
104 ptr = map_sysmem(mem_addr, 20);
105 ut_asserteq_str("tHIS IS A tESt", ptr);
106 unmap_sysmem(ptr);
107
108 return 0;
109}
110DM_TEST(dm_test_pci_swapcase, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Bin Meng82b31042018-08-03 01:14:48 -0700111
112/* Test that we can dynamically bind the device driver correctly */
113static int dm_test_pci_drvdata(struct unit_test_state *uts)
114{
115 struct udevice *bus, *swap;
116
117 /* Check that asking for the device automatically fires up PCI */
118 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
119
120 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
121 ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
Marek Vasut25db3402018-10-10 21:27:09 +0200122 ut_assertok(dev_of_valid(swap));
Bin Meng82b31042018-08-03 01:14:48 -0700123 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
124 ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
Marek Vasut25db3402018-10-10 21:27:09 +0200125 ut_assertok(dev_of_valid(swap));
126 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x10, 0), &swap));
127 ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
128 ut_assertok(!dev_of_valid(swap));
Bin Meng82b31042018-08-03 01:14:48 -0700129
130 return 0;
131}
132DM_TEST(dm_test_pci_drvdata, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Bin Meng3ed214a2018-08-03 01:14:50 -0700133
134/* Test that devices on PCI bus#2 can be accessed correctly */
135static int dm_test_pci_mixed(struct unit_test_state *uts)
136{
137 /* PCI bus#2 has both statically and dynamic declared devices */
138 struct udevice *bus, *swap;
139 u16 vendor, device;
140 ulong io_addr, mem_addr;
141 char *ptr;
142
143 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 2, &bus));
144
145 /* Test the dynamic device */
146 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x08, 0), &swap));
147 vendor = 0;
148 ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
149 ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
150
151 /* First test I/O */
152 io_addr = dm_pci_read_bar32(swap, 0);
153 outb(2, io_addr);
154 ut_asserteq(2, inb(io_addr));
155
156 /*
157 * Now test memory mapping - note we must unmap and remap to cause
158 * the swapcase emulation to see our data and response.
159 */
160 mem_addr = dm_pci_read_bar32(swap, 1);
161 ptr = map_sysmem(mem_addr, 30);
162 strcpy(ptr, "This is a TesT oN dYNAMIc");
163 unmap_sysmem(ptr);
164
165 ptr = map_sysmem(mem_addr, 30);
166 ut_asserteq_str("tHIS IS A tESt On DynamiC", ptr);
167 unmap_sysmem(ptr);
168
169 /* Test the static device */
170 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x1f, 0), &swap));
171 device = 0;
172 ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
Simon Glass34145812019-09-25 08:56:01 -0600173 ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
Bin Meng3ed214a2018-08-03 01:14:50 -0700174
175 /* First test I/O */
176 io_addr = dm_pci_read_bar32(swap, 0);
177 outb(2, io_addr);
178 ut_asserteq(2, inb(io_addr));
179
180 /*
181 * Now test memory mapping - note we must unmap and remap to cause
182 * the swapcase emulation to see our data and response.
183 */
184 mem_addr = dm_pci_read_bar32(swap, 1);
185 ptr = map_sysmem(mem_addr, 30);
186 strcpy(ptr, "This is a TesT oN sTATIc");
187 unmap_sysmem(ptr);
188
189 ptr = map_sysmem(mem_addr, 30);
190 ut_asserteq_str("tHIS IS A tESt On StatiC", ptr);
191 unmap_sysmem(ptr);
192
193 return 0;
194}
195DM_TEST(dm_test_pci_mixed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Bin Meng95e11062018-08-03 01:14:53 -0700196
197/* Test looking up PCI capability and extended capability */
198static int dm_test_pci_cap(struct unit_test_state *uts)
199{
200 struct udevice *bus, *swap;
201 int cap;
202
203 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
204 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
205
206 /* look up PCI_CAP_ID_EXP */
207 cap = dm_pci_find_capability(swap, PCI_CAP_ID_EXP);
208 ut_asserteq(PCI_CAP_ID_EXP_OFFSET, cap);
209
210 /* look up PCI_CAP_ID_PCIX */
211 cap = dm_pci_find_capability(swap, PCI_CAP_ID_PCIX);
212 ut_asserteq(0, cap);
213
Bin Meng7a206142018-10-15 02:21:22 -0700214 /* look up PCI_CAP_ID_MSIX starting from PCI_CAP_ID_PM_OFFSET */
215 cap = dm_pci_find_next_capability(swap, PCI_CAP_ID_PM_OFFSET,
216 PCI_CAP_ID_MSIX);
217 ut_asserteq(PCI_CAP_ID_MSIX_OFFSET, cap);
218
219 /* look up PCI_CAP_ID_VNDR starting from PCI_CAP_ID_EXP_OFFSET */
220 cap = dm_pci_find_next_capability(swap, PCI_CAP_ID_EXP_OFFSET,
221 PCI_CAP_ID_VNDR);
222 ut_asserteq(0, cap);
223
Bin Meng95e11062018-08-03 01:14:53 -0700224 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
225 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
226
227 /* look up PCI_EXT_CAP_ID_DSN */
228 cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_DSN);
229 ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap);
230
231 /* look up PCI_EXT_CAP_ID_SRIOV */
232 cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_SRIOV);
233 ut_asserteq(0, cap);
234
Bin Meng7a206142018-10-15 02:21:22 -0700235 /* look up PCI_EXT_CAP_ID_DSN starting from PCI_EXT_CAP_ID_ERR_OFFSET */
236 cap = dm_pci_find_next_ext_capability(swap, PCI_EXT_CAP_ID_ERR_OFFSET,
237 PCI_EXT_CAP_ID_DSN);
238 ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap);
239
240 /* look up PCI_EXT_CAP_ID_RCRB starting from PCI_EXT_CAP_ID_VC_OFFSET */
241 cap = dm_pci_find_next_ext_capability(swap, PCI_EXT_CAP_ID_VC_OFFSET,
242 PCI_EXT_CAP_ID_RCRB);
243 ut_asserteq(0, cap);
244
Bin Meng95e11062018-08-03 01:14:53 -0700245 return 0;
246}
247DM_TEST(dm_test_pci_cap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Alex Marginean21ebbaf2019-06-07 11:24:24 +0300248
249/* Test looking up BARs in EA capability structure */
250static int dm_test_pci_ea(struct unit_test_state *uts)
251{
252 struct udevice *bus, *swap;
253 void *bar;
254 int cap;
255
256 /*
257 * use emulated device mapping function, we're not using real physical
258 * addresses in this test
259 */
260 sandbox_set_enable_pci_map(true);
261
262 ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
263 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x01, 0), &swap));
264
265 /* look up PCI_CAP_ID_EA */
266 cap = dm_pci_find_capability(swap, PCI_CAP_ID_EA);
267 ut_asserteq(PCI_CAP_ID_EA_OFFSET, cap);
268
269 /* test swap case in BAR 1 */
270 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_0, 0);
271 ut_assertnonnull(bar);
272 *(int *)bar = 2; /* swap upper/lower */
273
274 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0);
275 ut_assertnonnull(bar);
276 strcpy(bar, "ea TEST");
277 unmap_sysmem(bar);
278 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0);
279 ut_assertnonnull(bar);
280 ut_asserteq_str("EA test", bar);
281
282 /* test magic values in BARs2, 4; BAR 3 is n/a */
283 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_2, 0);
284 ut_assertnonnull(bar);
285 ut_asserteq(PCI_EA_BAR2_MAGIC, *(u32 *)bar);
286
287 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0);
288 ut_assertnull(bar);
289
290 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_4, 0);
291 ut_assertnonnull(bar);
292 ut_asserteq(PCI_EA_BAR4_MAGIC, *(u32 *)bar);
293
294 return 0;
295}
296DM_TEST(dm_test_pci_ea, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
Simon Glass33c215a2019-09-15 12:08:58 -0600297
298/* Test the dev_read_addr_pci() function */
299static int dm_test_pci_addr_flat(struct unit_test_state *uts)
300{
301 struct udevice *swap1f, *swap1;
302 ulong io_addr, mem_addr;
303
304 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f));
305 io_addr = dm_pci_read_bar32(swap1f, 0);
306 ut_asserteq(io_addr, dev_read_addr_pci(swap1f));
307
308 /*
309 * This device has both I/O and MEM spaces but the MEM space appears
310 * first
311 */
312 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1));
313 mem_addr = dm_pci_read_bar32(swap1, 1);
314 ut_asserteq(mem_addr, dev_read_addr_pci(swap1));
315
316 return 0;
317}
318DM_TEST(dm_test_pci_addr_flat, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT |
319 DM_TESTF_FLAT_TREE);
320
321/*
322 * Test the dev_read_addr_pci() function with livetree. That function is
323 * not currently fully implemented, in that it fails to return the BAR address.
324 * Once that is implemented this test can be removed and dm_test_pci_addr_flat()
325 * can be used for both flattree and livetree by removing the DM_TESTF_FLAT_TREE
326 * flag above.
327 */
328static int dm_test_pci_addr_live(struct unit_test_state *uts)
329{
330 struct udevice *swap1f, *swap1;
331
332 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f));
333 ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1f));
334
335 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1));
336 ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1));
337
338 return 0;
339}
340DM_TEST(dm_test_pci_addr_live, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT |
341 DM_TESTF_LIVE_TREE);
Simon Glass20349782020-07-07 13:12:10 -0600342
343/* Test device_is_on_pci_bus() */
344static int dm_test_pci_on_bus(struct unit_test_state *uts)
345{
346 struct udevice *dev;
347
348 ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &dev));
349 ut_asserteq(true, device_is_on_pci_bus(dev));
350 ut_asserteq(false, device_is_on_pci_bus(dev_get_parent(dev)));
351 ut_asserteq(true, device_is_on_pci_bus(dev));
352
353 return 0;
354}
355DM_TEST(dm_test_pci_on_bus, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);