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Peter Griffinf9a9fc62015-07-30 18:55:24 +01001Introduction
2============
3
4HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: -
5* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
6* ARM Mali 450-MP4 GPU
7* 1GB 800MHz LPDDR3 DRAM
8* 4GB eMMC Flash Storage
9* microSD
10* 802.11a/b/g/n WiFi, Bluetooth
11
12The HiKey schematic can be found here: -
13https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf
14
15A SoC datasheet can be found here: -
16https://github.com/96boards/documentation/blob/master/hikey/
17Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
18
19Currently the u-boot port supports: -
20* USB
21* eMMC
22* SD card
23* GPIO
24
Peter Griffin532d5202016-04-20 17:14:03 +010025The HiKey U-Boot port has been tested with l-loader, booting ATF, which then boots
26U-Boot as the bl33.bin executable.
27
28Compile from source
29===================
30
31First get all the sources
32
33 > mkdir -p ~/hikey/src ~/hikey/bin
34 > cd ~/hikey/src
35 > git clone https://github.com/96boards/edk2.git
36 > git clone https://github.com/96boards/arm-trusted-firmware.git
37 > git clone https://github.com/96boards/l-loader.git
38 > git clone https://github.com/96boards/burn-boot.git
39
40Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
41The latest version can be obtained from the edk2 repo.
42
43 > cp edk2/HisiPkg/HiKeyPkg/NonFree/mcuimage.bin ~/hikey/bin/
44
45Get nvme.img binary (check this link is still the latest)
46 > wget -P ~/hikey/bin https://builds.96boards.org/releases/reference-platform/debian/hikey/16.03/bootloader/nvme.img
47
48Compile U-Boot
Peter Griffinf9a9fc62015-07-30 18:55:24 +010049==============
50
Peter Griffin532d5202016-04-20 17:14:03 +010051 > cd ~/hikey/src/u-boot
Peter Griffin9c71a212015-09-10 21:55:11 +010052 > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
53 > make CROSS_COMPILE=aarch64-linux-gnu-
Peter Griffin532d5202016-04-20 17:14:03 +010054 > cp u-boot.bin ~/hikey/bin
Peter Griffinf9a9fc62015-07-30 18:55:24 +010055
Peter Griffin532d5202016-04-20 17:14:03 +010056Compile ARM Trusted Firmware (ATF)
57==================================
Peter Griffinf9a9fc62015-07-30 18:55:24 +010058
Peter Griffin532d5202016-04-20 17:14:03 +010059 > cd ~/hikey/src/atf
60 > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
61 BL30=~/hikey/bin/mcuimage.bin \
62 BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
Peter Griffinf9a9fc62015-07-30 18:55:24 +010063
Peter Griffin532d5202016-04-20 17:14:03 +010064Copy resulting binaries
65 > cp build/hikey/debug/bl1.bin ~/hikey/bin
66 > cp build/hikey/debug/fip.bin ~/hikey/bin
Peter Griffinf9a9fc62015-07-30 18:55:24 +010067
Peter Griffin532d5202016-04-20 17:14:03 +010068Compile l-loader
69===============
70 > cd ~/hikey/l-loader
71 > make BL1=~/hikey/bin/bl1.bin all
72 > cp *.img ~/hikey/bin
73 > cp l-loader.bin ~/hikey.bin
Peter Griffinf9a9fc62015-07-30 18:55:24 +010074
75These instructions are adapted from
76https://github.com/96boards/documentation/wiki/HiKeyUEFI
77
78FLASHING
79========
80
Peter Griffin9c71a212015-09-10 21:55:11 +0100811. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
Peter Griffin532d5202016-04-20 17:14:03 +010082the hisi-idt.py utility.
Peter Griffinf9a9fc62015-07-30 18:55:24 +010083
Peter Griffin9c71a212015-09-10 21:55:11 +010084The command below assumes HiKey enumerated as the first USB serial port
Peter Griffin532d5202016-04-20 17:14:03 +010085 > sudo ~/hikey/burn_boot/hisi-idt.py -d /dev/ttyUSB0 --img1=~/hikey/bin/l-loader.bin
Peter Griffinf9a9fc62015-07-30 18:55:24 +010086
Peter Griffin532d5202016-04-20 17:14:03 +0100872. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device by plugging a USB A to mini B
Peter Griffin9c71a212015-09-10 21:55:11 +010088 cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
89
90 > sudo fastboot devices
91
920123456789ABCDEF fastboot
Peter Griffinf9a9fc62015-07-30 18:55:24 +010093
943. Flash the images
Peter Griffin532d5202016-04-20 17:14:03 +010095
96 > sudo fastboot flash ptable ~/hikey/bin/ptable.img
97 > sudo fastboot flash fastboot ~/hikey/bin/fip.bin
98 > sudo fastboot flash nvme ~/hikey/bin/nvme.img
Peter Griffinf9a9fc62015-07-30 18:55:24 +010099
Peter Griffin9c71a212015-09-10 21:55:11 +01001004. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100101 have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the
102 flashing twice in the past to avoid an ATF error.
103
Peter Griffin9c71a212015-09-10 21:55:11 +0100104 Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
105 will get 'dwc_otg_core_host_init: Timeout!' errors.
106
Peter Griffin532d5202016-04-20 17:14:03 +0100107See working boot trace below (by default trace is now output to UART3 not UART0 on latest
108ATF, U-Boot and Kernel sources): -
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100109
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100110debug EMMC boot: send RST_N .
111debug EMMC boot: start eMMC boot......
112load fastboot1!
Peter Griffin9c71a212015-09-10 21:55:11 +0100113
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100114Switch to aarch64 mode. CPU0 executes at 0xf9801000!
Peter Griffin9c71a212015-09-10 21:55:11 +0100115
116INFO: BL1: 0xf9810000 - 0xf9817000 [size = 28672]
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100117NOTICE: Booting Trusted Firmware
Peter Griffin9c71a212015-09-10 21:55:11 +0100118NOTICE: BL1: v1.1(debug):e8b7174
119NOTICE: BL1: Built : 19:16:44, Sep 8 2015
120INFO: BL1: RAM 0xf9810000 - 0xf9817000
121NOTICE: syspll frequency:1190494208Hz
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100122NOTICE: succeed to init lpddr3 rank0 dram phy
123INFO: lpddr3_freq_init, set ddrc 533mhz
124INFO: init ddr3 rank0
125INFO: ddr3 rank1 init pass
126INFO: lpddr3_freq_init, set ddrc 800mhz
127INFO: init ddr3 rank0
128INFO: ddr3 rank1 init pass
129INFO: Elpida DDR
Peter Griffin9c71a212015-09-10 21:55:11 +0100130INFO: ddr test value:0xa5a55a5a
131INFO: Hisilicon HiKey platform is initialized
132INFO: Using FIP
133INFO: Loading file 'bl2.bin' at address 0xf9818000
134INFO: File 'bl2.bin' loaded: 0xf9818000 - 0xf9821100
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100135NOTICE: BL1: Booting BL2
Peter Griffin9c71a212015-09-10 21:55:11 +0100136INFO: BL1: BL2 address = 0xf9818000
137INFO: BL1: BL2 spsr = 0x3c5
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100138INFO: [BDID] [fff91c18] midr: 0x410fd033
139INFO: [BDID] [fff91c1c] board type: 0
140INFO: [BDID] [fff91c20] board id: 0x2b
141INFO: init_acpu_dvfs: pmic version 17
142INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
143INFO: acpu_dvfs_volt_init: success!
144INFO: acpu_dvfs_set_freq: support freq num is 5
145INFO: acpu_dvfs_set_freq: start prof is 0x4
146INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5
147INFO: acpu_dvfs_set_freq: voltage:
Peter Griffin9c71a212015-09-10 21:55:11 +0100148INFO: - 0: 0x49
149INFO: - 1: 0x49
150INFO: - 2: 0x50
151INFO: - 3: 0x60
152INFO: - 4: 0x78
153NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):e8b7174
154NOTICE: BL2: Built : 19:16:46, Sep 8 2015
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100155INFO: BL2: Loading BL3-0
156INFO: Using FIP
Peter Griffin9c71a212015-09-10 21:55:11 +0100157INFO: Loading file 'bl30.bin' at address 0x1000000
158INFO: Skip reserving memory: 0x1000000 - 0x1023270
159INFO: File 'bl30.bin' loaded: 0x1000000 - 0x1023270
160INFO: bl2_plat_handle_bl30: [1000000] 3a334d43 34313032 2f38302f 30203133
161INFO: bl2_plat_handle_bl30: [10000c8] 0 0 b 0
162INFO: bl2_plat_handle_bl30: [1000190] 17 0 0 0
163INFO: bl2_plat_handle_bl30: [1023260] 0 0 0 0
164INFO: hisi_mcu_load_image: mcu sections 0:
165INFO: hisi_mcu_load_image: src = 0x1000200
166INFO: hisi_mcu_load_image: dst = 0xf6000000
167INFO: hisi_mcu_load_image: size = 512
168INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71
169INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x7600 0x201 0x1eae1 0x1ea71
170INFO: hisi_mcu_load_image: mcu sections 1:
171INFO: hisi_mcu_load_image: src = 0x1000400
172INFO: hisi_mcu_load_image: dst = 0xf6000200
173INFO: hisi_mcu_load_image: size = 27828
174INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
175INFO: hisi_mcu_load_image: [DST 0xf6000200] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
176INFO: hisi_mcu_load_image: mcu sections 2:
177INFO: hisi_mcu_load_image: src = 0x10070b4
178INFO: hisi_mcu_load_image: dst = 0xf6007200
179INFO: hisi_mcu_load_image: size = 1024
180INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0
181INFO: hisi_mcu_load_image: [DST 0xf6007200] 0x55 0x0 0x0 0x0
182INFO: hisi_mcu_load_image: mcu sections 3:
183INFO: hisi_mcu_load_image: src = 0x10074b4
184INFO: hisi_mcu_load_image: dst = 0xfff8e000
185INFO: hisi_mcu_load_image: size = 12704
186INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0
187INFO: hisi_mcu_load_image: [DST 0xfff8e000] 0x55 0x0 0x0 0x0
188INFO: hisi_mcu_load_image: mcu sections 4:
189INFO: hisi_mcu_load_image: src = 0x100a654
190INFO: hisi_mcu_load_image: dst = 0x5e00000
191INFO: hisi_mcu_load_image: size = 82912
192INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
193INFO: hisi_mcu_load_image: [DST 0x5e00000] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
194INFO: hisi_mcu_load_image: mcu sections 5:
195INFO: hisi_mcu_load_image: src = 0x101ea34
196INFO: hisi_mcu_load_image: dst = 0x5e143e0
197INFO: hisi_mcu_load_image: size = 12816
198INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443
199INFO: hisi_mcu_load_image: [DST 0x5e143e0] 0x33323130 0x37363534 0x42413938 0x46454443
200INFO: hisi_mcu_load_image: mcu sections 6:
201INFO: hisi_mcu_load_image: src = 0x1021c44
202INFO: hisi_mcu_load_image: dst = 0x5e1c1d0
203INFO: hisi_mcu_load_image: size = 3060
204INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0
205INFO: hisi_mcu_load_image: [DST 0x5e1c1d0] 0x0 0x0 0x0 0x0
206INFO: hisi_mcu_load_image: mcu sections 7:
207INFO: hisi_mcu_load_image: src = 0x1022838
208INFO: hisi_mcu_load_image: dst = 0x5e1cdc4
209INFO: hisi_mcu_load_image: size = 2616
210INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0
211INFO: hisi_mcu_load_image: [DST 0x5e1cdc4] 0xf80000a0 0x0 0xf80000ac 0x0
212INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
213INFO: bl2_plat_handle_bl30: mcu pc is 42933301
214INFO: bl2_plat_handle_bl30: AO_SC_PERIPH_CLKSTAT4 is 39018f09
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100215INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
216INFO: BL2: Loading BL3-1
217INFO: Using FIP
218INFO: Loading file 'bl31.bin' at address 0xf9858000
Peter Griffin9c71a212015-09-10 21:55:11 +0100219INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9861010
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100220INFO: BL2: Loading BL3-2
221INFO: Using FIP
222WARNING: Failed to access image 'bl32.bin' (-1)
223WARNING: Failed to load BL3-2 (-1)
224INFO: BL2: Loading BL3-3
225INFO: Using FIP
226INFO: Loading file 'bl33.bin' at address 0x35000000
Peter Griffin9c71a212015-09-10 21:55:11 +0100227INFO: File 'bl33.bin' loaded: 0x35000000 - 0x3504c468
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100228NOTICE: BL1: Booting BL3-1
Peter Griffin9c71a212015-09-10 21:55:11 +0100229INFO: BL1: BL3-1 address = 0xf9858000
230INFO: BL1: BL3-1 spsr = 0x3cd
231INFO: BL1: BL3-1 params address = 0xf9821920
232INFO: BL1: BL3-1 plat params address = 0x0
233NOTICE: BL3-1: v1.1(debug):e8b7174
234NOTICE: BL3-1: Built : 19:16:49, Sep 8 2015
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100235INFO: BL3-1: Initializing runtime services
236INFO: BL3-1: Preparing for EL3 exit to normal world
237INFO: BL3-1: Next image address = 0x35000000
238INFO: BL3-1: Next image spsr = 0x3c9
239
Peter Griffin9c71a212015-09-10 21:55:11 +0100240U-Boot 2015.10-rc2 (Sep 08 2015 - 20:29:33 +0100)hikey
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100241
242DRAM: 1008 MiB
Peter Griffin9c71a212015-09-10 21:55:11 +0100243HI6553 PMIC init
244MMC: config_sd_carddetect: SD card not present
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100245HiKey DWMMC: 0, HiKey DWMMC: 1
Peter Griffin9c71a212015-09-10 21:55:11 +0100246Card did not respond to voltage select!
247** Bad device mmc 1 **
248Using default environment
249
Peter Griffinf9a9fc62015-07-30 18:55:24 +0100250In: serial
251Out: serial
252Err: serial
253Net: Net Initialization Skipped
254No ethernet found.
255Hit any key to stop autoboot: 0
Peter Griffin9c71a212015-09-10 21:55:11 +0100256starting USB...
257USB0: Core Release: 3.00a
258scanning bus 0 for devices... 2 USB Device(s) found
259 scanning usb for storage devices... 0 Storage Device(s) found
260 scanning usb for ethernet devices... 0 Ethernet Device(s) found