Priyanka Jain | 58c3e62 | 2018-11-28 13:04:27 +0000 | [diff] [blame^] | 1 | Overview |
| 2 | -------- |
| 3 | The LX2160A Reference Design (RDB) is a high-performance computing, |
| 4 | evaluation, and development platform that supports the QorIQ LX2160A |
| 5 | Layerscape Architecture processor and its personalities. |
| 6 | |
| 7 | LX2160A SoC Overview |
| 8 | -------------------------------------- |
| 9 | For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc |
| 10 | |
| 11 | LX2160ARDB board Overview |
| 12 | ---------------------- |
| 13 | DDR Memory |
| 14 | Two ports of 72-bits (8-bits ECC) DDR4. |
| 15 | Each port supports four chip-selects and two DIMM |
| 16 | connectors. Data rate upto 3.2 GT/s. |
| 17 | |
| 18 | SERDES ports |
| 19 | Thress serdes controllers (24 lanes) |
| 20 | Serdes1: Supports two USXGMII connectors, each connected through |
| 21 | Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi |
| 22 | IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi |
| 23 | CS4223 phy. |
| 24 | |
| 25 | Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0 |
| 26 | connectors |
| 27 | |
| 28 | Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector |
| 29 | |
| 30 | eSDHC |
| 31 | eSDHC1: Supports a SD connector for connecting SD cards |
| 32 | eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC |
| 33 | |
| 34 | Octal SPI (XSPI) |
| 35 | Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator |
| 36 | for off-board emulation |
| 37 | |
| 38 | I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer |
| 39 | Serial Ports |
| 40 | |
| 41 | USB 3.0 |
| 42 | Two high speed USB 3.0 ports. First USB 3.0 port configured as |
| 43 | Host with Type-A connector, second USB 3.0 port configured as OTG |
| 44 | with micro-AB connector |
| 45 | |
| 46 | Serial Ports Two UART ports |
| 47 | Ethernet Two RGMII interfaces |
| 48 | Debug ARM JTAG support |
| 49 | |
| 50 | Booting Options |
| 51 | --------------- |
| 52 | a) Flexspi boot |
| 53 | b) SD boot |
| 54 | |
| 55 | Memory map for Flexspi flash |
| 56 | ---------------------------- |
| 57 | Image Flash Offset |
| 58 | bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000 |
| 59 | fip.bin (bl31 + bl33(u-boot) + |
| 60 | header for Secure-boot(secure-boot only)) 0x00100000 |
| 61 | Boot firmware Environment 0x00500000 |
| 62 | DDR PHY Firmware (fip_ddr_all.bin) 0x00800000 |
| 63 | DPAA2 MC Firmware 0x00A00000 |
| 64 | DPAA2 DPL 0x00D00000 |
| 65 | DPAA2 DPC 0x00E00000 |
| 66 | Kernel.itb 0x01000000 |
| 67 | |
| 68 | Memory map for sd card |
| 69 | ---------------------------- |
| 70 | Image SD card Offset |
| 71 | bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008 |
| 72 | fip.bin (bl31 + bl33(u-boot) + |
| 73 | header for Secure-boot(secure-boot only)) 0x00800 |
| 74 | Boot firmware Environment 0x02800 |
| 75 | DDR PHY Firmware (fip_ddr_all.bin) 0x04000 |
| 76 | DPAA2 MC Firmware 0x05000 |
| 77 | DPAA2 DPL 0x06800 |
| 78 | DPAA2 DPC 0x07000 |
| 79 | Kernel.itb 0x08000 |