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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manochae66c49f2016-02-11 15:47:20 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -07008#include <dm.h>
Simon Glass52559322019-11-14 12:57:46 -07009#include <init.h>
yannick fertre92eac582018-03-02 15:59:28 +010010#include <lcd.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060011#include <log.h>
Patrice Chotard77594d72019-02-22 15:04:44 +010012#include <miiphy.h>
13#include <phy_interface.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070014#include <ram.h>
Simon Glassb03e0512019-11-14 12:57:24 -070015#include <serial.h>
Vikas Manochab9747692017-05-28 12:55:10 -070016#include <spl.h>
yannick fertre92eac582018-03-02 15:59:28 +010017#include <splash.h>
18#include <st_logo_data.h>
19#include <video.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080020#include <asm/io.h>
21#include <asm/armv7m.h>
22#include <asm/arch/stm32.h>
23#include <asm/arch/gpio.h>
Michael Kurzb20b70f2017-01-22 16:04:27 +010024#include <asm/arch/syscfg.h>
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070025#include <asm/gpio.h>
Simon Glassc05ed002020-05-10 11:40:11 -060026#include <linux/delay.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080027
28DECLARE_GLOBAL_DATA_PTR;
29
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090030int dram_init(void)
31{
Vikas Manochab9747692017-05-28 12:55:10 -070032#ifndef CONFIG_SUPPORT_SPL
Patrice Chotard8ff21d62018-08-03 13:09:55 +020033 int rv;
Vikas Manochab9747692017-05-28 12:55:10 -070034 struct udevice *dev;
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070035 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
36 if (rv) {
37 debug("DRAM init failed: %d\n", rv);
38 return rv;
39 }
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090040
Vikas Manochab9747692017-05-28 12:55:10 -070041#endif
Patrice Chotard8ff21d62018-08-03 13:09:55 +020042 return fdtdec_setup_mem_size_base();
Vikas Manocha57af3cc2017-04-10 15:03:01 -070043}
44
45int dram_init_banksize(void)
46{
Patrice Chotard8ff21d62018-08-03 13:09:55 +020047 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090048}
49
Vikas Manocha280057b2017-04-10 15:02:59 -070050int board_early_init_f(void)
Michael Kurzd4363ba2017-01-22 16:04:30 +010051{
Michael Kurzd4363ba2017-01-22 16:04:30 +010052 return 0;
53}
Michael Kurzd4363ba2017-01-22 16:04:30 +010054
Vikas Manochab9747692017-05-28 12:55:10 -070055#ifdef CONFIG_SPL_BUILD
Vikas Manocha55a3ef72017-05-28 12:55:13 -070056#ifdef CONFIG_SPL_OS_BOOT
57int spl_start_uboot(void)
58{
59 debug("SPL: booting kernel\n");
60 /* break into full u-boot on 'c' */
61 return serial_tstc() && serial_getc() == 'c';
62}
63#endif
64
Vikas Manochab9747692017-05-28 12:55:10 -070065int spl_dram_init(void)
66{
67 struct udevice *dev;
68 int rv;
69 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
70 if (rv)
71 debug("DRAM init failed: %d\n", rv);
72 return rv;
73}
74void spl_board_init(void)
75{
76 spl_dram_init();
77 preloader_console_init();
78 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
79}
80u32 spl_boot_device(void)
81{
Vikas Manocha1a73bd82017-05-28 12:55:14 -070082 return BOOT_DEVICE_XIP;
Vikas Manochab9747692017-05-28 12:55:10 -070083}
84
85#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080086u32 get_board_rev(void)
87{
88 return 0;
89}
90
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070091int board_late_init(void)
92{
93 struct gpio_desc gpio = {};
94 int node;
95
96 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
97 if (node < 0)
98 return -1;
99
Simon Glass150c5af2017-05-30 21:47:09 -0600100 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700101 GPIOD_IS_OUT);
102
103 if (dm_gpio_is_valid(&gpio)) {
104 dm_gpio_set_value(&gpio, 0);
105 mdelay(10);
106 dm_gpio_set_value(&gpio, 1);
107 }
108
109 /* read button 1*/
110 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
111 if (node < 0)
112 return -1;
113
Simon Glass150c5af2017-05-30 21:47:09 -0600114 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
115 &gpio, GPIOD_IS_IN);
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700116
117 if (dm_gpio_is_valid(&gpio)) {
118 if (dm_gpio_get_value(&gpio))
119 puts("usr button is at HIGH LEVEL\n");
120 else
121 puts("usr button is at LOW LEVEL\n");
122 }
123
124 return 0;
125}
126
Vikas Manochae66c49f2016-02-11 15:47:20 -0800127int board_init(void)
128{
Vikas Manocha57af3cc2017-04-10 15:03:01 -0700129 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100130
131#ifdef CONFIG_ETH_DESIGNWARE
Patrice Chotard77594d72019-02-22 15:04:44 +0100132 const char *phy_mode;
133 int node;
134
135 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
136 if (node < 0)
137 return -1;
138
139 phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
140
141 switch (phy_get_interface_by_name(phy_mode)) {
142 case PHY_INTERFACE_MODE_RMII:
143 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
144 break;
145 case PHY_INTERFACE_MODE_MII:
146 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
147 break;
148 default:
149 printf("PHY interface %s not supported !\n", phy_mode);
150 }
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100151#endif
152
yannick fertre92eac582018-03-02 15:59:28 +0100153#if defined(CONFIG_CMD_BMP)
154 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
155 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
156#endif /* CONFIG_CMD_BMP */
157
Vikas Manochae66c49f2016-02-11 15:47:20 -0800158 return 0;
159}