blob: ae5e1109898e06509ba51d7a186b7ec7f1a3e530 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manochae66c49f2016-02-11 15:47:20 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -07008#include <dm.h>
Simon Glass52559322019-11-14 12:57:46 -07009#include <init.h>
yannick fertre92eac582018-03-02 15:59:28 +010010#include <lcd.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060011#include <log.h>
Patrice Chotard77594d72019-02-22 15:04:44 +010012#include <miiphy.h>
13#include <phy_interface.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070014#include <ram.h>
Simon Glassb03e0512019-11-14 12:57:24 -070015#include <serial.h>
Vikas Manochab9747692017-05-28 12:55:10 -070016#include <spl.h>
yannick fertre92eac582018-03-02 15:59:28 +010017#include <splash.h>
18#include <st_logo_data.h>
19#include <video.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080020#include <asm/io.h>
21#include <asm/armv7m.h>
22#include <asm/arch/stm32.h>
23#include <asm/arch/gpio.h>
Michael Kurzb20b70f2017-01-22 16:04:27 +010024#include <asm/arch/syscfg.h>
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070025#include <asm/gpio.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080026
27DECLARE_GLOBAL_DATA_PTR;
28
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090029int dram_init(void)
30{
Vikas Manochab9747692017-05-28 12:55:10 -070031#ifndef CONFIG_SUPPORT_SPL
Patrice Chotard8ff21d62018-08-03 13:09:55 +020032 int rv;
Vikas Manochab9747692017-05-28 12:55:10 -070033 struct udevice *dev;
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070034 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
35 if (rv) {
36 debug("DRAM init failed: %d\n", rv);
37 return rv;
38 }
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090039
Vikas Manochab9747692017-05-28 12:55:10 -070040#endif
Patrice Chotard8ff21d62018-08-03 13:09:55 +020041 return fdtdec_setup_mem_size_base();
Vikas Manocha57af3cc2017-04-10 15:03:01 -070042}
43
44int dram_init_banksize(void)
45{
Patrice Chotard8ff21d62018-08-03 13:09:55 +020046 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090047}
48
Vikas Manocha280057b2017-04-10 15:02:59 -070049int board_early_init_f(void)
Michael Kurzd4363ba2017-01-22 16:04:30 +010050{
Michael Kurzd4363ba2017-01-22 16:04:30 +010051 return 0;
52}
Michael Kurzd4363ba2017-01-22 16:04:30 +010053
Vikas Manochab9747692017-05-28 12:55:10 -070054#ifdef CONFIG_SPL_BUILD
Vikas Manocha55a3ef72017-05-28 12:55:13 -070055#ifdef CONFIG_SPL_OS_BOOT
56int spl_start_uboot(void)
57{
58 debug("SPL: booting kernel\n");
59 /* break into full u-boot on 'c' */
60 return serial_tstc() && serial_getc() == 'c';
61}
62#endif
63
Vikas Manochab9747692017-05-28 12:55:10 -070064int spl_dram_init(void)
65{
66 struct udevice *dev;
67 int rv;
68 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
69 if (rv)
70 debug("DRAM init failed: %d\n", rv);
71 return rv;
72}
73void spl_board_init(void)
74{
75 spl_dram_init();
76 preloader_console_init();
77 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
78}
79u32 spl_boot_device(void)
80{
Vikas Manocha1a73bd82017-05-28 12:55:14 -070081 return BOOT_DEVICE_XIP;
Vikas Manochab9747692017-05-28 12:55:10 -070082}
83
84#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080085u32 get_board_rev(void)
86{
87 return 0;
88}
89
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070090int board_late_init(void)
91{
92 struct gpio_desc gpio = {};
93 int node;
94
95 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
96 if (node < 0)
97 return -1;
98
Simon Glass150c5af2017-05-30 21:47:09 -060099 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700100 GPIOD_IS_OUT);
101
102 if (dm_gpio_is_valid(&gpio)) {
103 dm_gpio_set_value(&gpio, 0);
104 mdelay(10);
105 dm_gpio_set_value(&gpio, 1);
106 }
107
108 /* read button 1*/
109 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
110 if (node < 0)
111 return -1;
112
Simon Glass150c5af2017-05-30 21:47:09 -0600113 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
114 &gpio, GPIOD_IS_IN);
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700115
116 if (dm_gpio_is_valid(&gpio)) {
117 if (dm_gpio_get_value(&gpio))
118 puts("usr button is at HIGH LEVEL\n");
119 else
120 puts("usr button is at LOW LEVEL\n");
121 }
122
123 return 0;
124}
125
Vikas Manochae66c49f2016-02-11 15:47:20 -0800126int board_init(void)
127{
Vikas Manocha57af3cc2017-04-10 15:03:01 -0700128 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100129
130#ifdef CONFIG_ETH_DESIGNWARE
Patrice Chotard77594d72019-02-22 15:04:44 +0100131 const char *phy_mode;
132 int node;
133
134 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
135 if (node < 0)
136 return -1;
137
138 phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
139
140 switch (phy_get_interface_by_name(phy_mode)) {
141 case PHY_INTERFACE_MODE_RMII:
142 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
143 break;
144 case PHY_INTERFACE_MODE_MII:
145 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
146 break;
147 default:
148 printf("PHY interface %s not supported !\n", phy_mode);
149 }
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100150#endif
151
yannick fertre92eac582018-03-02 15:59:28 +0100152#if defined(CONFIG_CMD_BMP)
153 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
154 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
155#endif /* CONFIG_CMD_BMP */
156
Vikas Manochae66c49f2016-02-11 15:47:20 -0800157 return 0;
158}