Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Altera SPI driver |
| 3 | * |
| 4 | * based on bfin_spi.c |
| 5 | * Copyright (c) 2005-2008 Analog Devices Inc. |
| 6 | * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw> |
| 7 | * |
Jagannadha Sutradharudu Teki | e7b1e45 | 2013-10-14 13:31:24 +0530 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 9 | */ |
| 10 | #include <common.h> |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 11 | #include <dm.h> |
| 12 | #include <errno.h> |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 13 | #include <malloc.h> |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 14 | #include <fdtdec.h> |
Jagan Teki | bef87ad | 2015-10-27 23:11:11 +0530 | [diff] [blame] | 15 | #include <spi.h> |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 16 | #include <asm/io.h> |
| 17 | |
Jagan Teki | bef87ad | 2015-10-27 23:11:11 +0530 | [diff] [blame] | 18 | #define ALTERA_SPI_STATUS_RRDY_MSK BIT(7) |
| 19 | #define ALTERA_SPI_CONTROL_SSO_MSK BIT(10) |
| 20 | |
Marek Vasut | cdcdad8 | 2014-10-22 21:56:04 +0200 | [diff] [blame] | 21 | #ifndef CONFIG_ALTERA_SPI_IDLE_VAL |
Jagan Teki | bef87ad | 2015-10-27 23:11:11 +0530 | [diff] [blame] | 22 | #define CONFIG_ALTERA_SPI_IDLE_VAL 0xff |
Marek Vasut | cdcdad8 | 2014-10-22 21:56:04 +0200 | [diff] [blame] | 23 | #endif |
| 24 | |
Marek Vasut | eef6702 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 25 | struct altera_spi_regs { |
| 26 | u32 rxdata; |
| 27 | u32 txdata; |
| 28 | u32 status; |
| 29 | u32 control; |
| 30 | u32 _reserved; |
| 31 | u32 slave_sel; |
| 32 | }; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 33 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 34 | struct altera_spi_platdata { |
| 35 | struct altera_spi_regs *regs; |
| 36 | }; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 37 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 38 | struct altera_spi_priv { |
| 39 | struct altera_spi_regs *regs; |
| 40 | }; |
| 41 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 42 | static void spi_cs_activate(struct udevice *dev, uint cs) |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 43 | { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 44 | struct udevice *bus = dev->parent; |
| 45 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 46 | struct altera_spi_regs *const regs = priv->regs; |
| 47 | |
| 48 | writel(1 << cs, ®s->slave_sel); |
| 49 | writel(ALTERA_SPI_CONTROL_SSO_MSK, ®s->control); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 50 | } |
| 51 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 52 | static void spi_cs_deactivate(struct udevice *dev) |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 53 | { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 54 | struct udevice *bus = dev->parent; |
| 55 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 56 | struct altera_spi_regs *const regs = priv->regs; |
| 57 | |
| 58 | writel(0, ®s->control); |
| 59 | writel(0, ®s->slave_sel); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 60 | } |
| 61 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 62 | static int altera_spi_claim_bus(struct udevice *dev) |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 63 | { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 64 | struct udevice *bus = dev->parent; |
| 65 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 66 | struct altera_spi_regs *const regs = priv->regs; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 67 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 68 | writel(0, ®s->control); |
| 69 | writel(0, ®s->slave_sel); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 70 | |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 71 | return 0; |
| 72 | } |
| 73 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 74 | static int altera_spi_release_bus(struct udevice *dev) |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 75 | { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 76 | struct udevice *bus = dev->parent; |
| 77 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 78 | struct altera_spi_regs *const regs = priv->regs; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 79 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 80 | writel(0, ®s->slave_sel); |
| 81 | |
| 82 | return 0; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 83 | } |
| 84 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 85 | static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen, |
| 86 | const void *dout, void *din, unsigned long flags) |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 87 | { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 88 | struct udevice *bus = dev->parent; |
| 89 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 90 | struct altera_spi_regs *const regs = priv->regs; |
| 91 | struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); |
| 92 | |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 93 | /* assume spi core configured to do 8 bit transfers */ |
Marek Vasut | bc76b82 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 94 | unsigned int bytes = bitlen / 8; |
| 95 | const unsigned char *txp = dout; |
| 96 | unsigned char *rxp = din; |
| 97 | uint32_t reg, data, start; |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 98 | |
| 99 | debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 100 | bus->seq, slave_plat->cs, bitlen, bytes, flags); |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 101 | |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 102 | if (bitlen == 0) |
| 103 | goto done; |
| 104 | |
| 105 | if (bitlen % 8) { |
| 106 | flags |= SPI_XFER_END; |
| 107 | goto done; |
| 108 | } |
| 109 | |
| 110 | /* empty read buffer */ |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 111 | if (readl(®s->status) & ALTERA_SPI_STATUS_RRDY_MSK) |
| 112 | readl(®s->rxdata); |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 113 | |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 114 | if (flags & SPI_XFER_BEGIN) |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 115 | spi_cs_activate(dev, slave_plat->cs); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 116 | |
| 117 | while (bytes--) { |
Marek Vasut | bc76b82 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 118 | if (txp) |
| 119 | data = *txp++; |
| 120 | else |
| 121 | data = CONFIG_ALTERA_SPI_IDLE_VAL; |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 122 | |
Marek Vasut | bc76b82 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 123 | debug("%s: tx:%x ", __func__, data); |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 124 | writel(data, ®s->txdata); |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 125 | |
Marek Vasut | 80d7333 | 2014-10-22 21:56:01 +0200 | [diff] [blame] | 126 | start = get_timer(0); |
| 127 | while (1) { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 128 | reg = readl(®s->status); |
Marek Vasut | 80d7333 | 2014-10-22 21:56:01 +0200 | [diff] [blame] | 129 | if (reg & ALTERA_SPI_STATUS_RRDY_MSK) |
| 130 | break; |
| 131 | if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 132 | debug("%s: Transmission timed out!\n", __func__); |
| 133 | return -1; |
Marek Vasut | 80d7333 | 2014-10-22 21:56:01 +0200 | [diff] [blame] | 134 | } |
| 135 | } |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 136 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 137 | data = readl(®s->rxdata); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 138 | if (rxp) |
Marek Vasut | bc76b82 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 139 | *rxp++ = data & 0xff; |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 140 | |
Marek Vasut | bc76b82 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 141 | debug("rx:%x\n", data); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 142 | } |
Marek Vasut | 37dcc13 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 143 | |
| 144 | done: |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 145 | if (flags & SPI_XFER_END) |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 146 | spi_cs_deactivate(dev); |
Thomas Chou | 661ba14 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 147 | |
| 148 | return 0; |
| 149 | } |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 150 | |
| 151 | static int altera_spi_set_speed(struct udevice *bus, uint speed) |
| 152 | { |
| 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | static int altera_spi_set_mode(struct udevice *bus, uint mode) |
| 157 | { |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | static int altera_spi_probe(struct udevice *bus) |
| 162 | { |
| 163 | struct altera_spi_platdata *plat = dev_get_platdata(bus); |
| 164 | struct altera_spi_priv *priv = dev_get_priv(bus); |
| 165 | |
| 166 | priv->regs = plat->regs; |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | static int altera_spi_ofdata_to_platdata(struct udevice *bus) |
| 172 | { |
| 173 | struct altera_spi_platdata *plat = dev_get_platdata(bus); |
| 174 | |
Simon Glass | a821c4a | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 175 | plat->regs = map_physmem(devfdt_get_addr(bus), |
Thomas Chou | 7313e21 | 2015-11-14 11:17:25 +0800 | [diff] [blame] | 176 | sizeof(struct altera_spi_regs), |
| 177 | MAP_NOCACHE); |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 178 | |
| 179 | return 0; |
| 180 | } |
| 181 | |
| 182 | static const struct dm_spi_ops altera_spi_ops = { |
| 183 | .claim_bus = altera_spi_claim_bus, |
| 184 | .release_bus = altera_spi_release_bus, |
| 185 | .xfer = altera_spi_xfer, |
| 186 | .set_speed = altera_spi_set_speed, |
| 187 | .set_mode = altera_spi_set_mode, |
| 188 | /* |
| 189 | * cs_info is not needed, since we require all chip selects to be |
| 190 | * in the device tree explicitly |
| 191 | */ |
| 192 | }; |
| 193 | |
| 194 | static const struct udevice_id altera_spi_ids[] = { |
Thomas Chou | ddf34c2 | 2015-10-31 20:55:48 +0800 | [diff] [blame] | 195 | { .compatible = "altr,spi-1.0" }, |
| 196 | {} |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | U_BOOT_DRIVER(altera_spi) = { |
| 200 | .name = "altera_spi", |
| 201 | .id = UCLASS_SPI, |
| 202 | .of_match = altera_spi_ids, |
| 203 | .ops = &altera_spi_ops, |
| 204 | .ofdata_to_platdata = altera_spi_ofdata_to_platdata, |
| 205 | .platdata_auto_alloc_size = sizeof(struct altera_spi_platdata), |
| 206 | .priv_auto_alloc_size = sizeof(struct altera_spi_priv), |
| 207 | .probe = altera_spi_probe, |
| 208 | }; |