blob: 13191f34a9dc6c4315766af65c72710e9a055412 [file] [log] [blame]
Thomas Chou661ba142010-04-30 11:34:16 +08001/*
2 * Altera SPI driver
3 *
4 * based on bfin_spi.c
5 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
7 *
Jagannadha Sutradharudu Tekie7b1e452013-10-14 13:31:24 +05308 * SPDX-License-Identifier: GPL-2.0+
Thomas Chou661ba142010-04-30 11:34:16 +08009 */
10#include <common.h>
11#include <asm/io.h>
12#include <malloc.h>
13#include <spi.h>
14
Marek Vasuteef67022014-10-22 21:55:58 +020015struct altera_spi_regs {
16 u32 rxdata;
17 u32 txdata;
18 u32 status;
19 u32 control;
20 u32 _reserved;
21 u32 slave_sel;
22};
Thomas Chou661ba142010-04-30 11:34:16 +080023
24#define ALTERA_SPI_STATUS_ROE_MSK (0x8)
25#define ALTERA_SPI_STATUS_TOE_MSK (0x10)
26#define ALTERA_SPI_STATUS_TMT_MSK (0x20)
27#define ALTERA_SPI_STATUS_TRDY_MSK (0x40)
28#define ALTERA_SPI_STATUS_RRDY_MSK (0x80)
29#define ALTERA_SPI_STATUS_E_MSK (0x100)
30
31#define ALTERA_SPI_CONTROL_IROE_MSK (0x8)
32#define ALTERA_SPI_CONTROL_ITOE_MSK (0x10)
33#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40)
34#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80)
35#define ALTERA_SPI_CONTROL_IE_MSK (0x100)
36#define ALTERA_SPI_CONTROL_SSO_MSK (0x400)
37
38#ifndef CONFIG_SYS_ALTERA_SPI_LIST
39#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
40#endif
41
42static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
43
44struct altera_spi_slave {
Marek Vasuteef67022014-10-22 21:55:58 +020045 struct spi_slave slave;
46 struct altera_spi_regs *regs;
Thomas Chou661ba142010-04-30 11:34:16 +080047};
48#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
49
50__attribute__((weak))
51int spi_cs_is_valid(unsigned int bus, unsigned int cs)
52{
53 return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
54}
55
56__attribute__((weak))
57void spi_cs_activate(struct spi_slave *slave)
58{
59 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
Marek Vasuteef67022014-10-22 21:55:58 +020060 writel(1 << slave->cs, &altspi->regs->slave_sel);
61 writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control);
Thomas Chou661ba142010-04-30 11:34:16 +080062}
63
64__attribute__((weak))
65void spi_cs_deactivate(struct spi_slave *slave)
66{
67 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
Marek Vasuteef67022014-10-22 21:55:58 +020068 writel(0, &altspi->regs->control);
69 writel(0, &altspi->regs->slave_sel);
Thomas Chou661ba142010-04-30 11:34:16 +080070}
71
72void spi_init(void)
73{
74}
75
Thomas Choudf8f1252010-12-27 09:30:17 +080076void spi_set_speed(struct spi_slave *slave, uint hz)
77{
78 /* altera spi core does not support programmable speed */
79}
80
Thomas Chou661ba142010-04-30 11:34:16 +080081struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
82 unsigned int max_hz, unsigned int mode)
83{
84 struct altera_spi_slave *altspi;
85
86 if (!spi_cs_is_valid(bus, cs))
87 return NULL;
88
Simon Glassd3504fe2013-03-18 19:23:40 +000089 altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs);
Thomas Chou661ba142010-04-30 11:34:16 +080090 if (!altspi)
91 return NULL;
92
Marek Vasuteef67022014-10-22 21:55:58 +020093 altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus];
94 debug("%s: bus:%i cs:%i base:%p\n", __func__,
95 bus, cs, altspi->regs);
Thomas Chou661ba142010-04-30 11:34:16 +080096
97 return &altspi->slave;
98}
99
100void spi_free_slave(struct spi_slave *slave)
101{
102 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
103 free(altspi);
104}
105
106int spi_claim_bus(struct spi_slave *slave)
107{
108 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
109
110 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
Marek Vasuteef67022014-10-22 21:55:58 +0200111 writel(0, &altspi->regs->control);
112 writel(0, &altspi->regs->slave_sel);
Thomas Chou661ba142010-04-30 11:34:16 +0800113 return 0;
114}
115
116void spi_release_bus(struct spi_slave *slave)
117{
118 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
119
120 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
Marek Vasuteef67022014-10-22 21:55:58 +0200121 writel(0, &altspi->regs->slave_sel);
Thomas Chou661ba142010-04-30 11:34:16 +0800122}
123
124#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
125# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
126#endif
127
128int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
129 void *din, unsigned long flags)
130{
131 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
132 /* assume spi core configured to do 8 bit transfers */
133 uint bytes = bitlen / 8;
134 const uchar *txp = dout;
135 uchar *rxp = din;
136
137 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
138 slave->bus, slave->cs, bitlen, bytes, flags);
139 if (bitlen == 0)
140 goto done;
141
142 if (bitlen % 8) {
143 flags |= SPI_XFER_END;
144 goto done;
145 }
146
147 /* empty read buffer */
Marek Vasuteef67022014-10-22 21:55:58 +0200148 if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
149 readl(&altspi->regs->rxdata);
Thomas Chou661ba142010-04-30 11:34:16 +0800150 if (flags & SPI_XFER_BEGIN)
151 spi_cs_activate(slave);
152
153 while (bytes--) {
154 uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL;
155 debug("%s: tx:%x ", __func__, d);
Marek Vasuteef67022014-10-22 21:55:58 +0200156 writel(d, &altspi->regs->txdata);
157 while (!(readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK))
Thomas Chou661ba142010-04-30 11:34:16 +0800158 ;
Marek Vasuteef67022014-10-22 21:55:58 +0200159 d = readl(&altspi->regs->rxdata);
Thomas Chou661ba142010-04-30 11:34:16 +0800160 if (rxp)
161 *rxp++ = d;
162 debug("rx:%x\n", d);
163 }
164 done:
165 if (flags & SPI_XFER_END)
166 spi_cs_deactivate(slave);
167
168 return 0;
169}