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wdenk5b845b62002-08-21 21:57:24 +00001/*
wdenk5da627a2003-10-09 20:09:04 +00002 * (C) Copyright 2003
3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
4 *
wdenk5b845b62002-08-21 21:57:24 +00005 * (C) Copyright 2002
6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 *
26 */
27
28/*
wdenk5b845b62002-08-21 21:57:24 +000029 * Altera FPGA support
30 */
31#include <common.h>
wdenk5da627a2003-10-09 20:09:04 +000032#include <ACEX1K.h>
eran liberty3c735e72008-03-27 00:50:49 +010033#include <stratixII.h>
wdenk5b845b62002-08-21 21:57:24 +000034
wdenk5da627a2003-10-09 20:09:04 +000035/* Define FPGA_DEBUG to get debug printf's */
36/* #define FPGA_DEBUG */
wdenk5b845b62002-08-21 21:57:24 +000037
38#ifdef FPGA_DEBUG
39#define PRINTF(fmt,args...) printf (fmt ,##args)
40#else
41#define PRINTF(fmt,args...)
42#endif
43
wdenk5da627a2003-10-09 20:09:04 +000044/* Local Static Functions */
eran liberty3c735e72008-03-27 00:50:49 +010045static int altera_validate (Altera_desc * desc, const char *fn);
wdenk5da627a2003-10-09 20:09:04 +000046
wdenk5b845b62002-08-21 21:57:24 +000047/* ------------------------------------------------------------------------- */
Wolfgang Denke6a857d2011-07-30 13:33:49 +000048int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
wdenk5b845b62002-08-21 21:57:24 +000049{
wdenk5da627a2003-10-09 20:09:04 +000050 int ret_val = FPGA_FAIL; /* assume a failure */
51
Stefan Roese64cd52e2006-09-18 10:48:03 +020052 if (!altera_validate (desc, (char *)__FUNCTION__)) {
wdenk5da627a2003-10-09 20:09:04 +000053 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
54 } else {
55 switch (desc->family) {
56 case Altera_ACEX1K:
Stefan Roesef0ff4692006-08-15 14:15:51 +020057 case Altera_CYC2:
Matthias Fuchs01335022007-12-27 17:12:34 +010058#if defined(CONFIG_FPGA_ACEX1K)
wdenk5da627a2003-10-09 20:09:04 +000059 PRINTF ("%s: Launching the ACEX1K Loader...\n",
60 __FUNCTION__);
61 ret_val = ACEX1K_load (desc, buf, bsize);
eran liberty3c735e72008-03-27 00:50:49 +010062#elif defined(CONFIG_FPGA_CYCLON2)
Michael Jonesf18361b2011-07-14 22:09:29 +000063 PRINTF ("%s: Launching the CYCLONE II Loader...\n",
Stefan Roesef0ff4692006-08-15 14:15:51 +020064 __FUNCTION__);
65 ret_val = CYC2_load (desc, buf, bsize);
wdenk5da627a2003-10-09 20:09:04 +000066#else
67 printf ("%s: No support for ACEX1K devices.\n",
68 __FUNCTION__);
69#endif
70 break;
71
eran liberty3c735e72008-03-27 00:50:49 +010072#if defined(CONFIG_FPGA_STRATIX_II)
73 case Altera_StratixII:
74 PRINTF ("%s: Launching the Stratix II Loader...\n",
75 __FUNCTION__);
76 ret_val = StratixII_load (desc, buf, bsize);
77 break;
78#endif
wdenk5da627a2003-10-09 20:09:04 +000079 default:
80 printf ("%s: Unsupported family type, %d\n",
81 __FUNCTION__, desc->family);
82 }
83 }
84
85 return ret_val;
wdenk5b845b62002-08-21 21:57:24 +000086}
87
Wolfgang Denke6a857d2011-07-30 13:33:49 +000088int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
wdenk5b845b62002-08-21 21:57:24 +000089{
wdenk5da627a2003-10-09 20:09:04 +000090 int ret_val = FPGA_FAIL; /* assume a failure */
91
Stefan Roese64cd52e2006-09-18 10:48:03 +020092 if (!altera_validate (desc, (char *)__FUNCTION__)) {
wdenk5da627a2003-10-09 20:09:04 +000093 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
94 } else {
95 switch (desc->family) {
96 case Altera_ACEX1K:
Matthias Fuchs01335022007-12-27 17:12:34 +010097#if defined(CONFIG_FPGA_ACEX)
wdenk5da627a2003-10-09 20:09:04 +000098 PRINTF ("%s: Launching the ACEX1K Reader...\n",
99 __FUNCTION__);
100 ret_val = ACEX1K_dump (desc, buf, bsize);
101#else
102 printf ("%s: No support for ACEX1K devices.\n",
103 __FUNCTION__);
104#endif
105 break;
106
eran liberty3c735e72008-03-27 00:50:49 +0100107#if defined(CONFIG_FPGA_STRATIX_II)
108 case Altera_StratixII:
109 PRINTF ("%s: Launching the Stratix II Reader...\n",
110 __FUNCTION__);
111 ret_val = StratixII_dump (desc, buf, bsize);
112 break;
113#endif
wdenk5da627a2003-10-09 20:09:04 +0000114 default:
115 printf ("%s: Unsupported family type, %d\n",
116 __FUNCTION__, desc->family);
117 }
118 }
119
120 return ret_val;
wdenk5b845b62002-08-21 21:57:24 +0000121}
122
123int altera_info( Altera_desc *desc )
124{
wdenk5da627a2003-10-09 20:09:04 +0000125 int ret_val = FPGA_FAIL;
126
Stefan Roese64cd52e2006-09-18 10:48:03 +0200127 if (altera_validate (desc, (char *)__FUNCTION__)) {
wdenk5da627a2003-10-09 20:09:04 +0000128 printf ("Family: \t");
129 switch (desc->family) {
130 case Altera_ACEX1K:
131 printf ("ACEX1K\n");
132 break;
Stefan Roesef0ff4692006-08-15 14:15:51 +0200133 case Altera_CYC2:
134 printf ("CYCLON II\n");
135 break;
eran liberty3c735e72008-03-27 00:50:49 +0100136 case Altera_StratixII:
137 printf ("Stratix II\n");
138 break;
139 /* Add new family types here */
wdenk5da627a2003-10-09 20:09:04 +0000140 default:
141 printf ("Unknown family type, %d\n", desc->family);
142 }
143
144 printf ("Interface type:\t");
145 switch (desc->iface) {
146 case passive_serial:
147 printf ("Passive Serial (PS)\n");
148 break;
149 case passive_parallel_synchronous:
150 printf ("Passive Parallel Synchronous (PPS)\n");
151 break;
152 case passive_parallel_asynchronous:
153 printf ("Passive Parallel Asynchronous (PPA)\n");
154 break;
155 case passive_serial_asynchronous:
156 printf ("Passive Serial Asynchronous (PSA)\n");
157 break;
158 case altera_jtag_mode: /* Not used */
159 printf ("JTAG Mode\n");
160 break;
eran liberty3c735e72008-03-27 00:50:49 +0100161 case fast_passive_parallel:
162 printf ("Fast Passive Parallel (FPP)\n");
163 break;
164 case fast_passive_parallel_security:
165 printf
166 ("Fast Passive Parallel with Security (FPPS) \n");
167 break;
wdenk5da627a2003-10-09 20:09:04 +0000168 /* Add new interface types here */
169 default:
170 printf ("Unsupported interface type, %d\n", desc->iface);
171 }
172
173 printf ("Device Size: \t%d bytes\n"
174 "Cookie: \t0x%x (%d)\n",
175 desc->size, desc->cookie, desc->cookie);
176
177 if (desc->iface_fns) {
178 printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
179 switch (desc->family) {
180 case Altera_ACEX1K:
Stefan Roesef0ff4692006-08-15 14:15:51 +0200181 case Altera_CYC2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100182#if defined(CONFIG_FPGA_ACEX1K)
wdenk5da627a2003-10-09 20:09:04 +0000183 ACEX1K_info (desc);
Matthias Fuchs01335022007-12-27 17:12:34 +0100184#elif defined(CONFIG_FPGA_CYCLON2)
Stefan Roesef0ff4692006-08-15 14:15:51 +0200185 CYC2_info (desc);
wdenk5da627a2003-10-09 20:09:04 +0000186#else
187 /* just in case */
188 printf ("%s: No support for ACEX1K devices.\n",
189 __FUNCTION__);
190#endif
191 break;
eran liberty3c735e72008-03-27 00:50:49 +0100192#if defined(CONFIG_FPGA_STRATIX_II)
193 case Altera_StratixII:
194 StratixII_info (desc);
195 break;
196#endif
wdenk5da627a2003-10-09 20:09:04 +0000197 /* Add new family types here */
198 default:
199 /* we don't need a message here - we give one up above */
wdenkb77fad32005-04-07 22:36:40 +0000200 break;
wdenk5da627a2003-10-09 20:09:04 +0000201 }
202 } else {
203 printf ("No Device Function Table.\n");
204 }
205
206 ret_val = FPGA_SUCCESS;
207 } else {
208 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
209 }
210
211 return ret_val;
212}
213
wdenk5b845b62002-08-21 21:57:24 +0000214/* ------------------------------------------------------------------------- */
215
eran liberty3c735e72008-03-27 00:50:49 +0100216static int altera_validate (Altera_desc * desc, const char *fn)
wdenk5da627a2003-10-09 20:09:04 +0000217{
York Sun472d5462013-04-01 11:29:11 -0700218 int ret_val = false;
wdenk5da627a2003-10-09 20:09:04 +0000219
220 if (desc) {
221 if ((desc->family > min_altera_type) &&
222 (desc->family < max_altera_type)) {
223 if ((desc->iface > min_altera_iface_type) &&
224 (desc->iface < max_altera_iface_type)) {
225 if (desc->size) {
York Sun472d5462013-04-01 11:29:11 -0700226 ret_val = true;
wdenk5da627a2003-10-09 20:09:04 +0000227 } else {
228 printf ("%s: NULL part size\n", fn);
229 }
230 } else {
231 printf ("%s: Invalid Interface type, %d\n",
232 fn, desc->iface);
233 }
234 } else {
235 printf ("%s: Invalid family type, %d\n", fn, desc->family);
236 }
237 } else {
238 printf ("%s: NULL descriptor!\n", fn);
239 }
240
241 return ret_val;
242}
wdenk5b845b62002-08-21 21:57:24 +0000243
244/* ------------------------------------------------------------------------- */