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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk2262cfe2002-11-18 00:14:45 +00002/*
Bin Mengfe0c33a2014-12-12 21:05:22 +08003 * U-Boot - x86 Startup Code
wdenk2262cfe2002-11-18 00:14:45 +00004 *
Graeme Russdbf71152011-04-13 19:43:26 +10005 * (C) Copyright 2008-2011
6 * Graeme Russ, <graeme.russ@gmail.com>
7 *
8 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02009 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk2262cfe2002-11-18 00:14:45 +000010 */
11
wdenk2262cfe2002-11-18 00:14:45 +000012#include <config.h>
Graeme Russ161b3582010-10-07 20:03:29 +110013#include <asm/global_data.h>
Simon Glassd1cd0452014-11-12 22:42:09 -070014#include <asm/post.h>
Graeme Russ109ad142011-12-31 10:24:36 +110015#include <asm/processor.h>
Graeme Russ0c24c9c2011-02-12 15:11:32 +110016#include <asm/processor-flags.h>
Graeme Russ9e6c5722011-12-31 22:58:15 +110017#include <generated/generic-asm-offsets.h>
Bin Mengfe0c33a2014-12-12 21:05:22 +080018#include <generated/asm-offsets.h>
wdenk2262cfe2002-11-18 00:14:45 +000019
wdenk2262cfe2002-11-18 00:14:45 +000020.section .text
21.code32
22.globl _start
wdenk8bde7f72003-06-27 21:31:46 +000023.type _start, @function
Graeme Russfea25722011-04-13 19:43:28 +100024.globl _x86boot_start
25_x86boot_start:
Graeme Russ077e1952010-04-24 00:05:42 +100026 /*
Simon Glassda3a95d2015-07-31 09:31:25 -060027 * This is the fail-safe 32-bit bootstrap entry point.
28 *
29 * This code is used when booting from another boot loader like
30 * coreboot or EFI. So we repeat some of the same init found in
31 * start16.
Graeme Russ077e1952010-04-24 00:05:42 +100032 */
33 cli
34 cld
35
Graeme Russ2f0e0cd2011-11-08 02:33:23 +000036 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ077e1952010-04-24 00:05:42 +100037 movl %cr0, %eax
Graeme Russ0c24c9c2011-02-12 15:11:32 +110038 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ077e1952010-04-24 00:05:42 +100039 movl %eax, %cr0
40 wbinvd
41
Gabe Black91d82a22012-11-03 11:41:28 +000042 /* Tell 32-bit code it is being entered from an in-RAM copy */
Simon Glass83ec7de2015-07-31 09:31:28 -060043 movl $GD_FLG_WARM_BOOT, %ebx
Simon Glass42fde3052015-08-04 12:33:57 -060044
45 /*
46 * Zero the BIST (Built-In Self Test) value since we don't have it.
47 * It must be 0 or the previous loader would have reported an error.
48 */
49 movl $0, %ebp
50
Gabe Black91d82a22012-11-03 11:41:28 +000051 jmp 1f
Simon Glass83ec7de2015-07-31 09:31:28 -060052
53 /* Add a way for tools to discover the _start entry point */
54 .align 4
55 .long 0x12345678
wdenk8bde7f72003-06-27 21:31:46 +000056_start:
Gabe Black91d82a22012-11-03 11:41:28 +000057 /*
Simon Glassda3a95d2015-07-31 09:31:25 -060058 * This is the 32-bit cold-reset entry point, coming from start16.
Simon Glass83ec7de2015-07-31 09:31:28 -060059 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
Gabe Black91d82a22012-11-03 11:41:28 +000060 */
Simon Glass83ec7de2015-07-31 09:31:28 -060061 movl $GD_FLG_COLD_BOOT, %ebx
Simon Glass42fde3052015-08-04 12:33:57 -060062
Simon Glassf67cd512014-11-06 13:20:10 -070063 /* Save BIST */
64 movl %eax, %ebp
Simon Glass42fde3052015-08-04 12:33:57 -0600651:
66
67 /* Save table pointer */
68 movl %ecx, %esi
Graeme Russ077e1952010-04-24 00:05:42 +100069
Andy Shevchenko446d4e02017-02-05 16:52:00 +030070#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glasse5aa8a92016-03-16 07:44:40 -060071 lgdt gdt_ptr2
72#endif
73
Simon Glassda3a95d2015-07-31 09:31:25 -060074 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ109ad142011-12-31 10:24:36 +110075 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ8ffb2e82010-10-07 20:03:21 +110076 movw %ax, %fs
77 movw %ax, %ds
78 movw %ax, %gs
79 movw %ax, %es
80 movw %ax, %ss
wdenk8bde7f72003-06-27 21:31:46 +000081
Mike Williams16263082011-07-22 04:01:30 +000082 /* Clear the interrupt vectors */
Graeme Russ077e1952010-04-24 00:05:42 +100083 lidt blank_idt_ptr
84
Simon Glassda3a95d2015-07-31 09:31:25 -060085 /*
86 * Critical early platform init - generally not used, we prefer init
87 * to happen later when we have a console, in case something goes
88 * wrong.
89 */
wdenk2262cfe2002-11-18 00:14:45 +000090 jmp early_board_init
Graeme Russ88fa0a62010-10-07 20:03:27 +110091.globl early_board_init_ret
wdenk2262cfe2002-11-18 00:14:45 +000092early_board_init_ret:
Simon Glassd1cd0452014-11-12 22:42:09 -070093 post_code(POST_START)
wdenk8bde7f72003-06-27 21:31:46 +000094
Graeme Russed4cba72011-02-12 15:11:52 +110095 /* Initialise Cache-As-RAM */
96 jmp car_init
97.globl car_init_ret
98car_init_ret:
Bin Mengbceb9f02014-12-12 21:05:31 +080099#ifndef CONFIG_HAVE_FSP
Graeme Russed4cba72011-02-12 15:11:52 +1100100 /*
101 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
102 * or fully initialised SDRAM - we really don't care which)
103 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glassda3a95d2015-07-31 09:31:25 -0600104 * and early malloc() area. The MRC requires some space at the top.
Simon Glass76f90f32014-11-06 13:20:04 -0700105 *
106 * Stack grows down from top of CAR. We have:
107 *
108 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass65dd74a2014-11-12 22:42:28 -0700109 * MRC area
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600110 * global_data with x86 global descriptor table
Simon Glass76f90f32014-11-06 13:20:04 -0700111 * early malloc area
112 * stack
113 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russed4cba72011-02-12 15:11:52 +1100114 */
Simon Glass65dd74a2014-11-12 22:42:28 -0700115 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
116#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
117 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
118#endif
Bin Mengbceb9f02014-12-12 21:05:31 +0800119#else
120 /*
Bin Meng48aa6c22015-08-20 06:40:20 -0700121 * U-Boot enters here twice. For the first time it comes from
122 * car_init_done() with esp points to a temporary stack and esi
123 * set to zero. For the second time it comes from fsp_init_done()
124 * with esi holding the HOB list address returned by the FSP.
Bin Mengbceb9f02014-12-12 21:05:31 +0800125 */
126#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600127 /* Set up global data */
128 mov %esp, %eax
Albert ARIBAUDecc30662015-11-25 17:56:32 +0100129 call board_init_f_alloc_reserve
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600130 mov %eax, %esp
Albert ARIBAUDecc30662015-11-25 17:56:32 +0100131 call board_init_f_init_reserve
Graeme Russ8d616252012-11-27 15:38:36 +0000132
Simon Glass60994a02015-10-18 19:51:26 -0600133#ifdef CONFIG_DEBUG_UART
134 call debug_uart_init
135#endif
Simon Glassbbbe55f2015-08-02 18:07:21 -0600136
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600137 /* Get address of global_data */
138 mov %fs:0, %edx
Bin Mengbceb9f02014-12-12 21:05:31 +0800139#ifdef CONFIG_HAVE_FSP
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600140 /* Store the HOB list if we have one */
Bin Mengaefaff82015-06-07 11:33:14 +0800141 test %esi, %esi
142 jz skip_hob
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600143 movl %esi, GD_HOB_LIST(%edx)
Bin Mengbceb9f02014-12-12 21:05:31 +0800144
Bin Meng57b10f52015-08-20 06:40:19 -0700145 /*
146 * After fsp_init() returns, the stack has already been switched to a
147 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
148 * Enlarge the size of malloc() pool before relocation since we have
149 * plenty of memory now.
150 */
151 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
152 movl %esp, GD_MALLOC_BASE(%edx)
Bin Mengaefaff82015-06-07 11:33:14 +0800153skip_hob:
Simon Glass42fde3052015-08-04 12:33:57 -0600154#else
155 /* Store table pointer */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600156 movl %esi, GD_TABLE(%edx)
Bin Mengaefaff82015-06-07 11:33:14 +0800157#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600158 /* Store BIST */
159 movl %ebp, GD_BIST(%edx)
Graeme Russ9e6c5722011-12-31 22:58:15 +1100160
Graeme Russ96cd6642011-02-12 15:11:54 +1100161 /* Set parameter to board_init_f() to boot flags */
Simon Glassd1cd0452014-11-12 22:42:09 -0700162 post_code(POST_START_DONE)
Graeme Russdbf71152011-04-13 19:43:26 +1000163 xorl %eax, %eax
Graeme Russ161b3582010-10-07 20:03:29 +1100164
Simon Glassda3a95d2015-07-31 09:31:25 -0600165 /* Enter, U-Boot! */
Graeme Russdbf71152011-04-13 19:43:26 +1000166 call board_init_f
wdenk2262cfe2002-11-18 00:14:45 +0000167
168 /* indicate (lack of) progress */
wdenk8bde7f72003-06-27 21:31:46 +0000169 movw $0x85, %ax
Graeme Russfb002902011-02-12 15:11:58 +1100170 jmp die
171
Graeme Russf48dd6f2012-01-01 15:06:39 +1100172.globl board_init_f_r_trampoline
173.type board_init_f_r_trampoline, @function
174board_init_f_r_trampoline:
Graeme Russfb002902011-02-12 15:11:58 +1100175 /*
176 * SDRAM has been initialised, U-Boot code has been copied into
177 * RAM, BSS has been cleared and relocation adjustments have been
178 * made. It is now time to jump into the in-RAM copy of U-Boot
179 *
Graeme Russf48dd6f2012-01-01 15:06:39 +1100180 * %eax = Address of top of new stack
Graeme Russfb002902011-02-12 15:11:58 +1100181 */
182
Graeme Russ8d616252012-11-27 15:38:36 +0000183 /* Stack grows down from top of SDRAM */
Graeme Russfb002902011-02-12 15:11:58 +1100184 movl %eax, %esp
185
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600186 /* See if we need to disable CAR */
Simon Glass801d70c2015-01-01 16:18:13 -0700187.weak car_uninit
188 movl $car_uninit, %eax
189 cmpl $0, %eax
190 jz 1f
191
192 call car_uninit
1931:
Simon Glassda3a95d2015-07-31 09:31:25 -0600194 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russf48dd6f2012-01-01 15:06:39 +1100195 call board_init_f_r
Graeme Russfb002902011-02-12 15:11:58 +1100196
Graeme Russ2f0e0cd2011-11-08 02:33:23 +0000197die:
198 hlt
wdenk2262cfe2002-11-18 00:14:45 +0000199 jmp die
wdenk8bde7f72003-06-27 21:31:46 +0000200 hlt
Graeme Russ077e1952010-04-24 00:05:42 +1000201
202blank_idt_ptr:
203 .word 0 /* limit */
204 .long 0 /* base */
Graeme Russa206cc22011-11-08 02:33:19 +0000205
206 .p2align 2 /* force 4-byte alignment */
207
Simon Glassda3a95d2015-07-31 09:31:25 -0600208 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russa206cc22011-11-08 02:33:19 +0000209multiboot_header:
210 /* magic */
Simon Glassda3a95d2015-07-31 09:31:25 -0600211 .long 0x1badb002
Graeme Russa206cc22011-11-08 02:33:19 +0000212 /* flags */
213 .long (1 << 16)
214 /* checksum */
215 .long -0x1BADB002 - (1 << 16)
216 /* header addr */
217 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
218 /* load addr */
219 .long CONFIG_SYS_TEXT_BASE
220 /* load end addr */
221 .long 0
222 /* bss end addr */
223 .long 0
224 /* entry addr */
225 .long CONFIG_SYS_TEXT_BASE
Simon Glasse5aa8a92016-03-16 07:44:40 -0600226
Andy Shevchenko446d4e02017-02-05 16:52:00 +0300227#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glasse5aa8a92016-03-16 07:44:40 -0600228 /*
229 * The following Global Descriptor Table is just enough to get us into
230 * 'Flat Protected Mode' - It will be discarded as soon as the final
231 * GDT is setup in a safe location in RAM
232 */
233gdt_ptr2:
234 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
235 .long gdt_rom2 /* base */
236
237 /* Some CPUs are picky about GDT alignment... */
238 .align 16
239.globl gdt_rom2
240gdt_rom2:
241 /*
242 * The GDT table ...
243 *
244 * Selector Type
245 * 0x00 NULL
246 * 0x08 Unused
247 * 0x10 32bit code
248 * 0x18 32bit data/stack
249 */
250 /* The NULL Desciptor - Mandatory */
251 .word 0x0000 /* limit_low */
252 .word 0x0000 /* base_low */
253 .byte 0x00 /* base_middle */
254 .byte 0x00 /* access */
255 .byte 0x00 /* flags + limit_high */
256 .byte 0x00 /* base_high */
257
258 /* Unused Desciptor - (matches Linux) */
259 .word 0x0000 /* limit_low */
260 .word 0x0000 /* base_low */
261 .byte 0x00 /* base_middle */
262 .byte 0x00 /* access */
263 .byte 0x00 /* flags + limit_high */
264 .byte 0x00 /* base_high */
265
266 /*
267 * The Code Segment Descriptor:
268 * - Base = 0x00000000
269 * - Size = 4GB
270 * - Access = Present, Ring 0, Exec (Code), Readable
271 * - Flags = 4kB Granularity, 32-bit
272 */
273 .word 0xffff /* limit_low */
274 .word 0x0000 /* base_low */
275 .byte 0x00 /* base_middle */
276 .byte 0x9b /* access */
277 .byte 0xcf /* flags + limit_high */
278 .byte 0x00 /* base_high */
279
280 /*
281 * The Data Segment Descriptor:
282 * - Base = 0x00000000
283 * - Size = 4GB
284 * - Access = Present, Ring 0, Non-Exec (Data), Writable
285 * - Flags = 4kB Granularity, 32-bit
286 */
287 .word 0xffff /* limit_low */
288 .word 0x0000 /* base_low */
289 .byte 0x00 /* base_middle */
290 .byte 0x93 /* access */
291 .byte 0xcf /* flags + limit_high */
292 .byte 0x00 /* base_high */
293#endif