wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
Bin Meng | fe0c33a | 2014-12-12 21:05:22 +0800 | [diff] [blame^] | 2 | * U-Boot - x86 Startup Code |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 3 | * |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * (C) Copyright 2008-2011 |
| 5 | * Graeme Russ, <graeme.russ@gmail.com> |
| 6 | * |
| 7 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 8 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 9 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 13 | #include <config.h> |
| 14 | #include <version.h> |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 15 | #include <asm/global_data.h> |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 16 | #include <asm/post.h> |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 17 | #include <asm/processor.h> |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 18 | #include <asm/processor-flags.h> |
Graeme Russ | 9e6c572 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 19 | #include <generated/generic-asm-offsets.h> |
Bin Meng | fe0c33a | 2014-12-12 21:05:22 +0800 | [diff] [blame^] | 20 | #include <generated/asm-offsets.h> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 21 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 22 | .section .text |
| 23 | .code32 |
| 24 | .globl _start |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 25 | .type _start, @function |
Graeme Russ | fea2572 | 2011-04-13 19:43:28 +1000 | [diff] [blame] | 26 | .globl _x86boot_start |
| 27 | _x86boot_start: |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 28 | /* |
| 29 | * This is the fail safe 32-bit bootstrap entry point. The |
| 30 | * following code is not executed from a cold-reset (actually, a |
| 31 | * lot of it is, but from real-mode after cold reset. It is |
| 32 | * repeated here to put the board into a state as close to cold |
| 33 | * reset as necessary) |
| 34 | */ |
| 35 | cli |
| 36 | cld |
| 37 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 38 | /* Turn off cache (this might require a 486-class CPU) */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 39 | movl %cr0, %eax |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 40 | orl $(X86_CR0_NW | X86_CR0_CD), %eax |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 41 | movl %eax, %cr0 |
| 42 | wbinvd |
| 43 | |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 44 | /* Tell 32-bit code it is being entered from an in-RAM copy */ |
| 45 | movw $GD_FLG_WARM_BOOT, %bx |
| 46 | jmp 1f |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 47 | _start: |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 48 | /* |
| 49 | * This is the 32-bit cold-reset entry point. Initialize %bx to 0 |
| 50 | * in case we're preceeded by some sort of boot stub. |
| 51 | */ |
| 52 | movw $GD_FLG_COLD_BOOT, %bx |
| 53 | 1: |
Simon Glass | f67cd51 | 2014-11-06 13:20:10 -0700 | [diff] [blame] | 54 | /* Save BIST */ |
| 55 | movl %eax, %ebp |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 56 | |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 57 | /* Load the segement registes to match the gdt loaded in start16.S */ |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 58 | movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax |
Graeme Russ | 8ffb2e8 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 59 | movw %ax, %fs |
| 60 | movw %ax, %ds |
| 61 | movw %ax, %gs |
| 62 | movw %ax, %es |
| 63 | movw %ax, %ss |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 64 | |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 65 | /* Clear the interrupt vectors */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 66 | lidt blank_idt_ptr |
| 67 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 68 | /* Early platform init (setup gpio, etc ) */ |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 69 | jmp early_board_init |
Graeme Russ | 88fa0a6 | 2010-10-07 20:03:27 +1100 | [diff] [blame] | 70 | .globl early_board_init_ret |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 71 | early_board_init_ret: |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 72 | post_code(POST_START) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 73 | |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 74 | /* Initialise Cache-As-RAM */ |
| 75 | jmp car_init |
| 76 | .globl car_init_ret |
| 77 | car_init_ret: |
| 78 | /* |
| 79 | * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, |
| 80 | * or fully initialised SDRAM - we really don't care which) |
| 81 | * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack |
Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 82 | * and early malloc area. The MRC requires some space at the top. |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 83 | * |
| 84 | * Stack grows down from top of CAR. We have: |
| 85 | * |
| 86 | * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE |
Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 87 | * MRC area |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 88 | * global_data |
| 89 | * x86 global descriptor table |
| 90 | * early malloc area |
| 91 | * stack |
| 92 | * bottom-> CONFIG_SYS_CAR_ADDR |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 93 | */ |
Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 94 | movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp |
| 95 | #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE |
| 96 | subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp |
| 97 | #endif |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 98 | |
| 99 | /* Reserve space on stack for global data */ |
| 100 | subl $GENERATED_GBL_DATA_SIZE, %esp |
| 101 | |
| 102 | /* Align global data to 16-byte boundary */ |
| 103 | andl $0xfffffff0, %esp |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 104 | post_code(POST_START_STACK) |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 105 | |
Simon Glass | fbd7282 | 2014-10-10 07:49:15 -0600 | [diff] [blame] | 106 | /* Zero the global data since it won't happen later */ |
| 107 | xorl %eax, %eax |
| 108 | movl $GENERATED_GBL_DATA_SIZE, %ecx |
| 109 | movl %esp, %edi |
| 110 | rep stosb |
| 111 | |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 112 | /* Setup first parameter to setup_gdt, pointer to global_data */ |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 113 | movl %esp, %eax |
| 114 | |
| 115 | /* Reserve space for global descriptor table */ |
| 116 | subl $X86_GDT_SIZE, %esp |
| 117 | |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 118 | /* Align temporary global descriptor table to 16-byte boundary */ |
| 119 | andl $0xfffffff0, %esp |
| 120 | movl %esp, %ecx |
| 121 | |
Simon Glass | 5dbcaa2 | 2014-10-10 07:49:16 -0600 | [diff] [blame] | 122 | #if defined(CONFIG_SYS_MALLOC_F_LEN) |
| 123 | subl $CONFIG_SYS_MALLOC_F_LEN, %esp |
| 124 | movl %eax, %edx |
| 125 | addl $GD_MALLOC_BASE, %edx |
| 126 | movl %esp, (%edx) |
| 127 | #endif |
Simon Glass | f67cd51 | 2014-11-06 13:20:10 -0700 | [diff] [blame] | 128 | /* Store BIST */ |
| 129 | movl %eax, %edx |
| 130 | addl $GD_BIST, %edx |
| 131 | movl %ebp, (%edx) |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 132 | |
| 133 | /* Set second parameter to setup_gdt */ |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 134 | movl %ecx, %edx |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 135 | |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 136 | /* Setup global descriptor table so gd->xyz works */ |
| 137 | call setup_gdt |
Graeme Russ | 9e6c572 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 138 | |
Graeme Russ | 96cd664 | 2011-02-12 15:11:54 +1100 | [diff] [blame] | 139 | /* Set parameter to board_init_f() to boot flags */ |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 140 | post_code(POST_START_DONE) |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 141 | xorl %eax, %eax |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 142 | |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 143 | /* Enter, U-boot! */ |
| 144 | call board_init_f |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 145 | |
| 146 | /* indicate (lack of) progress */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 147 | movw $0x85, %ax |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 148 | jmp die |
| 149 | |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 150 | .globl board_init_f_r_trampoline |
| 151 | .type board_init_f_r_trampoline, @function |
| 152 | board_init_f_r_trampoline: |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 153 | /* |
| 154 | * SDRAM has been initialised, U-Boot code has been copied into |
| 155 | * RAM, BSS has been cleared and relocation adjustments have been |
| 156 | * made. It is now time to jump into the in-RAM copy of U-Boot |
| 157 | * |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 158 | * %eax = Address of top of new stack |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 159 | */ |
| 160 | |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 161 | /* Stack grows down from top of SDRAM */ |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 162 | movl %eax, %esp |
| 163 | |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 164 | /* Reserve space on stack for global data */ |
| 165 | subl $GENERATED_GBL_DATA_SIZE, %esp |
| 166 | |
| 167 | /* Align global data to 16-byte boundary */ |
| 168 | andl $0xfffffff0, %esp |
| 169 | |
| 170 | /* Setup first parameter to memcpy (and setup_gdt) */ |
| 171 | movl %esp, %eax |
| 172 | |
| 173 | /* Setup second parameter to memcpy */ |
| 174 | fs movl 0, %edx |
| 175 | |
| 176 | /* Set third parameter to memcpy */ |
| 177 | movl $GENERATED_GBL_DATA_SIZE, %ecx |
| 178 | |
| 179 | /* Copy global data from CAR to SDRAM stack */ |
| 180 | call memcpy |
| 181 | |
| 182 | /* Reserve space for global descriptor table */ |
| 183 | subl $X86_GDT_SIZE, %esp |
| 184 | |
| 185 | /* Align global descriptor table to 16-byte boundary */ |
| 186 | andl $0xfffffff0, %esp |
| 187 | |
| 188 | /* Set second parameter to setup_gdt */ |
| 189 | movl %esp, %edx |
| 190 | |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 191 | /* Setup global descriptor table so gd->xyz works */ |
| 192 | call setup_gdt |
| 193 | |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 194 | /* Re-enter U-Boot by calling board_init_f_r */ |
| 195 | call board_init_f_r |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 196 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 197 | die: |
| 198 | hlt |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 199 | jmp die |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 200 | hlt |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 201 | |
| 202 | blank_idt_ptr: |
| 203 | .word 0 /* limit */ |
| 204 | .long 0 /* base */ |
Graeme Russ | a206cc2 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 205 | |
| 206 | .p2align 2 /* force 4-byte alignment */ |
| 207 | |
| 208 | multiboot_header: |
| 209 | /* magic */ |
| 210 | .long 0x1BADB002 |
| 211 | /* flags */ |
| 212 | .long (1 << 16) |
| 213 | /* checksum */ |
| 214 | .long -0x1BADB002 - (1 << 16) |
| 215 | /* header addr */ |
| 216 | .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE |
| 217 | /* load addr */ |
| 218 | .long CONFIG_SYS_TEXT_BASE |
| 219 | /* load end addr */ |
| 220 | .long 0 |
| 221 | /* bss end addr */ |
| 222 | .long 0 |
| 223 | /* entry addr */ |
| 224 | .long CONFIG_SYS_TEXT_BASE |