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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05302/*
3 * Copyright 2016 Freescale Semiconductor, Inc.
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05304 */
5
6#include <common.h>
7#include <i2c.h>
8#include <asm/io.h>
9#include <asm/arch/clock.h>
10#include <asm/arch/fsl_serdes.h>
Prabhakar Kushwaha5b404be2017-01-30 17:05:35 +053011#ifdef CONFIG_FSL_LS_PPA
12#include <asm/arch/ppa.h>
13#endif
York Sun4961eaf2017-03-06 09:02:34 -080014#include <asm/arch/mmu.h>
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053015#include <asm/arch/soc.h>
16#include <hwconfig.h>
17#include <ahci.h>
18#include <mmc.h>
19#include <scsi.h>
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053020#include <fsl_esdhc.h>
21#include <environment.h>
22#include <fsl_mmdc.h>
23#include <netdev.h>
Vinitha Pillai-B5722311d14bf2017-03-23 13:48:20 +053024#include <fsl_sec.h>
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053025
26DECLARE_GLOBAL_DATA_PTR;
27
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053028int checkboard(void)
29{
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +053030#ifdef CONFIG_TARGET_LS1012ARDB
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053031 u8 in1;
32
33 puts("Board: LS1012ARDB ");
34
35 /* Initialize i2c early for Serial flash bank information */
36 i2c_set_bus_num(0);
37
Yangbo Lu481fb012017-12-08 15:35:35 +080038 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) {
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053039 printf("Error reading i2c boot information!\n");
40 return 0; /* Don't want to hang() on this error */
41 }
42
43 puts("Version");
Yangbo Lu4a47bf82017-12-08 15:35:36 +080044 switch (in1 & SW_REV_MASK) {
45 case SW_REV_A:
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053046 puts(": RevA");
Yangbo Lu4a47bf82017-12-08 15:35:36 +080047 break;
48 case SW_REV_B:
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053049 puts(": RevB");
Yangbo Lu4a47bf82017-12-08 15:35:36 +080050 break;
51 case SW_REV_C:
52 puts(": RevC");
53 break;
54 case SW_REV_C1:
55 puts(": RevC1");
56 break;
57 case SW_REV_C2:
58 puts(": RevC2");
59 break;
60 case SW_REV_D:
61 puts(": RevD");
62 break;
63 case SW_REV_E:
64 puts(": RevE");
65 break;
66 default:
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053067 puts(": unknown");
Yangbo Lu4a47bf82017-12-08 15:35:36 +080068 break;
69 }
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053070
71 printf(", boot from QSPI");
Yangbo Lu481fb012017-12-08 15:35:35 +080072 if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU)
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053073 puts(": emu\n");
Yangbo Lu481fb012017-12-08 15:35:35 +080074 else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1)
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053075 puts(": bank1\n");
Yangbo Lu481fb012017-12-08 15:35:35 +080076 else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2)
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053077 puts(": bank2\n");
78 else
79 puts("unknown\n");
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +053080#else
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053081
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +053082 puts("Board: LS1012A2G5RDB ");
83#endif
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053084 return 0;
85}
86
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053087int dram_init(void)
88{
York Sun1fdcc8d2016-09-26 08:09:25 -070089 static const struct fsl_mmdc_info mparam = {
90 0x05180000, /* mdctl */
91 0x00030035, /* mdpdc */
92 0x12554000, /* mdotc */
93 0xbabf7954, /* mdcfg0 */
94 0xdb328f64, /* mdcfg1 */
95 0x01ff00db, /* mdcfg2 */
96 0x00001680, /* mdmisc */
97 0x0f3c8000, /* mdref */
98 0x00002000, /* mdrwd */
99 0x00bf1023, /* mdor */
100 0x0000003f, /* mdasp */
101 0x0000022a, /* mpodtctrl */
102 0xa1390003, /* mpzqhwctrl */
103 };
104
105 mmdc_init(&mparam);
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530106
107 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
York Sun4961eaf2017-03-06 09:02:34 -0800108#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
109 /* This will break-before-make MMU for DDR */
110 update_early_mmu_table();
111#endif
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530112
113 return 0;
114}
115
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530116
117int board_early_init_f(void)
118{
119 fsl_lsch2_early_init_f();
120
121 return 0;
122}
123
124int board_init(void)
125{
Ashish Kumar63b23162017-08-11 11:09:14 +0530126 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
127 CONFIG_SYS_CCI400_OFFSET);
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530128 /*
129 * Set CCI-400 control override register to enable barrier
130 * transaction
131 */
132 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
133
Hou Zhiqiangb392a6d2016-08-02 19:03:27 +0800134#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
135 erratum_a010315();
136#endif
137
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530138#ifdef CONFIG_ENV_IS_NOWHERE
139 gd->env_addr = (ulong)&default_environment[0];
140#endif
141
Vinitha Pillai-B5722311d14bf2017-03-23 13:48:20 +0530142#ifdef CONFIG_FSL_CAAM
143 sec_init();
144#endif
145
Prabhakar Kushwaha5b404be2017-01-30 17:05:35 +0530146#ifdef CONFIG_FSL_LS_PPA
147 ppa_init();
148#endif
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530149 return 0;
150}
151
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +0530152#ifdef CONFIG_TARGET_LS1012ARDB
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800153int esdhc_status_fixup(void *blob, const char *compat)
154{
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800155 char esdhc1_path[] = "/soc/esdhc@1580000";
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800156 bool sdhc2_en = false;
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800157 u8 mux_sdhc2;
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800158 u8 io = 0;
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800159
160 i2c_set_bus_num(0);
161
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800162 /* IO1[7:3] is the field of board revision info. */
163 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) {
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800164 printf("Error reading i2c boot information!\n");
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800165 return 0;
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800166 }
167
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800168 /* hwconfig method is used for RevD and later versions. */
169 if ((io & SW_REV_MASK) <= SW_REV_D) {
170#ifdef CONFIG_HWCONFIG
171 if (hwconfig("esdhc1"))
172 sdhc2_en = true;
173#endif
174 } else {
175 /*
176 * The I2C IO-expander for mux select is used to control
177 * the muxing of various onboard interfaces.
178 *
179 * IO0[3:2] indicates SDHC2 interface demultiplexer
180 * select lines.
181 * 00 - SDIO wifi
182 * 01 - GPIO (to Arduino)
183 * 10 - eMMC Memory
184 * 11 - SPI
185 */
186 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) {
187 printf("Error reading i2c boot information!\n");
188 return 0;
189 }
190
191 mux_sdhc2 = (io & 0x0c) >> 2;
192 /* Enable SDHC2 only when use SDIO wifi and eMMC */
193 if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
194 sdhc2_en = true;
195 }
Yangbo Lu6aaa5392017-12-08 15:35:37 +0800196 if (sdhc2_en)
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800197 do_fixup_by_path(blob, esdhc1_path, "status", "okay",
198 sizeof("okay"), 1);
199 else
200 do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
201 sizeof("disabled"), 1);
202 return 0;
203}
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +0530204#endif
Yangbo Lu5e4a6db2017-01-17 10:43:56 +0800205
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530206int ft_board_setup(void *blob, bd_t *bd)
207{
208 arch_fixup_fdt(blob);
209
210 ft_cpu_setup(blob, bd);
211
212 return 0;
213}