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Michael Trimarchi6b924872008-11-28 13:22:09 +01001/*
Ramneek Mehresh1b719e62011-03-23 15:20:43 +05302 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
Vivek Mahajan4ef01012009-05-25 17:23:16 +05303 *
Michael Trimarchi6b924872008-11-28 13:22:09 +01004 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
5 *
6 * Author: Tor Krill tor@excito.com
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <pci.h>
26#include <usb.h>
Michael Trimarchi6b924872008-11-28 13:22:09 +010027#include <asm/io.h>
Vivek Mahajan4ef01012009-05-25 17:23:16 +053028#include <usb/ehci-fsl.h>
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053029#include <hwconfig.h>
Michael Trimarchi6b924872008-11-28 13:22:09 +010030
Jean-Christophe PLAGNIOL-VILLARD2731b9a2009-04-03 12:46:58 +020031#include "ehci.h"
Michael Trimarchi6b924872008-11-28 13:22:09 +010032
33/*
34 * Create the appropriate control structures to manage
35 * a new EHCI host controller.
36 *
37 * Excerpts from linux ehci fsl driver.
38 */
Lucas Stach676ae062012-09-26 00:14:35 +020039int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Michael Trimarchi6b924872008-11-28 13:22:09 +010040{
Vivek Mahajan4ef01012009-05-25 17:23:16 +053041 struct usb_ehci *ehci;
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053042 const char *phy_type = NULL;
43 size_t len;
Kumar Galadd22f7c2011-11-09 10:04:15 -060044#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
45 char usb_phy[5];
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053046
47 usb_phy[0] = '\0';
Kumar Galadd22f7c2011-11-09 10:04:15 -060048#endif
Michael Trimarchi6b924872008-11-28 13:22:09 +010049
Damien Dusha29c6fbe2010-10-14 15:27:06 +020050 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
Lucas Stach676ae062012-09-26 00:14:35 +020051 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
52 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
53 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
Michael Trimarchi6b924872008-11-28 13:22:09 +010054
Michael Trimarchi6b924872008-11-28 13:22:09 +010055 /* Set to Host mode */
Vivek Mahajan08066152009-06-19 17:56:00 +053056 setbits_le32(&ehci->usbmode, CM_HOST);
Michael Trimarchi6b924872008-11-28 13:22:09 +010057
Vivek Mahajan08066152009-06-19 17:56:00 +053058 out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
59 out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
Michael Trimarchi6b924872008-11-28 13:22:09 +010060
61 /* Init phy */
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053062 if (hwconfig_sub("usb1", "phy_type"))
63 phy_type = hwconfig_subarg("usb1", "phy_type", &len);
Vivek Mahajan4ef01012009-05-25 17:23:16 +053064 else
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053065 phy_type = getenv("usb_phy_type");
66
67 if (!phy_type) {
68#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
69 /* if none specified assume internal UTMI */
70 strcpy(usb_phy, "utmi");
71 phy_type = usb_phy;
72#else
73 printf("WARNING: USB phy type not defined !!\n");
74 return -1;
75#endif
76 }
77
78 if (!strcmp(phy_type, "utmi")) {
79#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
80 setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
81 setbits_be32(&ehci->control, UTMI_PHY_EN);
82 udelay(1000); /* delay required for PHY Clk to appear */
83#endif
Lucas Stach676ae062012-09-26 00:14:35 +020084 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053085 } else {
86#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
87 clrbits_be32(&ehci->control, UTMI_PHY_EN);
88 setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
89 udelay(1000); /* delay required for PHY Clk to appear */
90#endif
Lucas Stach676ae062012-09-26 00:14:35 +020091 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053092 }
Michael Trimarchi6b924872008-11-28 13:22:09 +010093
94 /* Enable interface. */
Vivek Mahajan08066152009-06-19 17:56:00 +053095 setbits_be32(&ehci->control, USB_EN);
Michael Trimarchi6b924872008-11-28 13:22:09 +010096
Vivek Mahajan08066152009-06-19 17:56:00 +053097 out_be32(&ehci->prictrl, 0x0000000c);
98 out_be32(&ehci->age_cnt_limit, 0x00000040);
99 out_be32(&ehci->sictrl, 0x00000001);
Michael Trimarchi6b924872008-11-28 13:22:09 +0100100
Vivek Mahajan08066152009-06-19 17:56:00 +0530101 in_le32(&ehci->usbmode);
Michael Trimarchi6b924872008-11-28 13:22:09 +0100102
103 return 0;
104}
105
106/*
107 * Destroy the appropriate control structures corresponding
108 * the the EHCI host controller.
109 */
Lucas Stach676ae062012-09-26 00:14:35 +0200110int ehci_hcd_stop(int index)
Michael Trimarchi6b924872008-11-28 13:22:09 +0100111{
112 return 0;
113}