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Michael Trimarchi6b924872008-11-28 13:22:09 +01001/*
Ramneek Mehresh1b719e62011-03-23 15:20:43 +05302 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
Vivek Mahajan4ef01012009-05-25 17:23:16 +05303 *
Michael Trimarchi6b924872008-11-28 13:22:09 +01004 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
5 *
6 * Author: Tor Krill tor@excito.com
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <pci.h>
26#include <usb.h>
Michael Trimarchi6b924872008-11-28 13:22:09 +010027#include <asm/io.h>
Vivek Mahajan4ef01012009-05-25 17:23:16 +053028#include <usb/ehci-fsl.h>
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053029#include <hwconfig.h>
Michael Trimarchi6b924872008-11-28 13:22:09 +010030
Jean-Christophe PLAGNIOL-VILLARD2731b9a2009-04-03 12:46:58 +020031#include "ehci.h"
Jean-Christophe PLAGNIOL-VILLARD2731b9a2009-04-03 12:46:58 +020032#include "ehci-core.h"
Michael Trimarchi6b924872008-11-28 13:22:09 +010033
34/*
35 * Create the appropriate control structures to manage
36 * a new EHCI host controller.
37 *
38 * Excerpts from linux ehci fsl driver.
39 */
40int ehci_hcd_init(void)
41{
Vivek Mahajan4ef01012009-05-25 17:23:16 +053042 struct usb_ehci *ehci;
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053043 const char *phy_type = NULL;
44 size_t len;
Kumar Galadd22f7c2011-11-09 10:04:15 -060045#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
46 char usb_phy[5];
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053047
48 usb_phy[0] = '\0';
Kumar Galadd22f7c2011-11-09 10:04:15 -060049#endif
Michael Trimarchi6b924872008-11-28 13:22:09 +010050
Damien Dusha29c6fbe2010-10-14 15:27:06 +020051 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
Vivek Mahajan08066152009-06-19 17:56:00 +053052 hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
michael51ab1422008-12-11 13:43:55 +010053 hcor = (struct ehci_hcor *)((uint32_t) hccr +
54 HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
Michael Trimarchi6b924872008-11-28 13:22:09 +010055
Michael Trimarchi6b924872008-11-28 13:22:09 +010056 /* Set to Host mode */
Vivek Mahajan08066152009-06-19 17:56:00 +053057 setbits_le32(&ehci->usbmode, CM_HOST);
Michael Trimarchi6b924872008-11-28 13:22:09 +010058
Vivek Mahajan08066152009-06-19 17:56:00 +053059 out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
60 out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
Michael Trimarchi6b924872008-11-28 13:22:09 +010061
62 /* Init phy */
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053063 if (hwconfig_sub("usb1", "phy_type"))
64 phy_type = hwconfig_subarg("usb1", "phy_type", &len);
Vivek Mahajan4ef01012009-05-25 17:23:16 +053065 else
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053066 phy_type = getenv("usb_phy_type");
67
68 if (!phy_type) {
69#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
70 /* if none specified assume internal UTMI */
71 strcpy(usb_phy, "utmi");
72 phy_type = usb_phy;
73#else
74 printf("WARNING: USB phy type not defined !!\n");
75 return -1;
76#endif
77 }
78
79 if (!strcmp(phy_type, "utmi")) {
80#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
81 setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
82 setbits_be32(&ehci->control, UTMI_PHY_EN);
83 udelay(1000); /* delay required for PHY Clk to appear */
84#endif
85 out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI);
86 } else {
87#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
88 clrbits_be32(&ehci->control, UTMI_PHY_EN);
89 setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
90 udelay(1000); /* delay required for PHY Clk to appear */
91#endif
Vivek Mahajan4ef01012009-05-25 17:23:16 +053092 out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI);
Ramneek Mehresh1b719e62011-03-23 15:20:43 +053093 }
Michael Trimarchi6b924872008-11-28 13:22:09 +010094
95 /* Enable interface. */
Vivek Mahajan08066152009-06-19 17:56:00 +053096 setbits_be32(&ehci->control, USB_EN);
Michael Trimarchi6b924872008-11-28 13:22:09 +010097
Vivek Mahajan08066152009-06-19 17:56:00 +053098 out_be32(&ehci->prictrl, 0x0000000c);
99 out_be32(&ehci->age_cnt_limit, 0x00000040);
100 out_be32(&ehci->sictrl, 0x00000001);
Michael Trimarchi6b924872008-11-28 13:22:09 +0100101
Vivek Mahajan08066152009-06-19 17:56:00 +0530102 in_le32(&ehci->usbmode);
Michael Trimarchi6b924872008-11-28 13:22:09 +0100103
104 return 0;
105}
106
107/*
108 * Destroy the appropriate control structures corresponding
109 * the the EHCI host controller.
110 */
111int ehci_hcd_stop(void)
112{
113 return 0;
114}