Michal Simek | 051a8ad | 2018-03-27 13:43:05 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 2 | /* |
3 | * Xilinx ZC770 XM012 board DTS | ||||
4 | * | ||||
Michal Simek | 051a8ad | 2018-03-27 13:43:05 +0200 | [diff] [blame] | 5 | * Copyright (C) 2013-2018 Xilinx, Inc. |
Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 6 | */ |
7 | /dts-v1/; | ||||
8 | #include "zynq-7000.dtsi" | ||||
9 | |||||
10 | / { | ||||
Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 11 | compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 12 | model = "Xilinx Zynq"; |
Masahiro Yamada | 7d34c5d | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 13 | |
Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 14 | aliases { |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 15 | i2c0 = &i2c0; |
16 | i2c1 = &i2c1; | ||||
Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 17 | serial0 = &uart1; |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 18 | spi0 = &spi1; |
Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 19 | }; |
20 | |||||
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 21 | chosen { |
Michal Simek | 936bbc5 | 2016-04-07 11:15:00 +0200 | [diff] [blame] | 22 | bootargs = ""; |
Michal Simek | 4691941 | 2016-01-12 13:56:44 +0100 | [diff] [blame] | 23 | stdout-path = "serial0:115200n8"; |
Masahiro Yamada | 7d34c5d | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 24 | }; |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 25 | |
Michal Simek | cc7978b | 2016-11-11 13:11:37 +0100 | [diff] [blame] | 26 | memory@0 { |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 27 | device_type = "memory"; |
28 | reg = <0x0 0x40000000>; | ||||
29 | }; | ||||
30 | }; | ||||
31 | |||||
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 32 | &can1 { |
33 | status = "okay"; | ||||
34 | }; | ||||
35 | |||||
36 | &i2c0 { | ||||
37 | status = "okay"; | ||||
38 | clock-frequency = <400000>; | ||||
39 | |||||
Michal Simek | 99a2e34 | 2018-03-27 13:48:51 +0200 | [diff] [blame^] | 40 | eeprom0: eeprom@52 { |
41 | compatible = "atmel,24c02"; | ||||
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 42 | reg = <0x52>; |
43 | }; | ||||
44 | }; | ||||
45 | |||||
46 | &i2c1 { | ||||
47 | status = "okay"; | ||||
48 | clock-frequency = <400000>; | ||||
49 | |||||
Michal Simek | 99a2e34 | 2018-03-27 13:48:51 +0200 | [diff] [blame^] | 50 | eeprom1: eeprom@52 { |
51 | compatible = "atmel,24c02"; | ||||
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 52 | reg = <0x52>; |
53 | }; | ||||
54 | }; | ||||
55 | |||||
Michal Simek | 7ebf67a | 2016-01-14 13:09:16 +0100 | [diff] [blame] | 56 | &spi1 { |
57 | status = "okay"; | ||||
58 | num-cs = <4>; | ||||
59 | is-decoded-cs = <0>; | ||||
60 | }; | ||||
61 | |||||
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 62 | &uart1 { |
Simon Glass | 035c6b2 | 2015-10-17 19:41:24 -0600 | [diff] [blame] | 63 | u-boot,dm-pre-reloc; |
Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 64 | status = "okay"; |
Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 65 | }; |