blob: 613332e1dc3f6c49058aaa7610dc7001d9b7ce85 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070026#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050027#include <mapmem.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028
29/* TODO: Can we move these into arch/ headers? */
30#ifdef CONFIG_8xx
31#include <mpc8xx.h>
32#endif
33#ifdef CONFIG_5xx
34#include <mpc5xx.h>
35#endif
36#ifdef CONFIG_MPC5xxx
37#include <mpc5xxx.h>
38#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070039#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070040#include <asm/mp.h>
41#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000042
Simon Glassa733b062013-04-26 02:53:43 +000043#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000044#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000045#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020046#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070047#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000048#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000049#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000050#include <asm/io.h>
51#include <asm/sections.h>
Alexey Brodkin3fb80162015-02-24 19:40:36 +030052#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +000053#include <asm/init_helpers.h>
54#include <asm/relocate.h>
55#endif
Simon Glassa733b062013-04-26 02:53:43 +000056#ifdef CONFIG_SANDBOX
57#include <asm/state.h>
58#endif
Simon Glassab7cd622014-07-23 06:55:04 -060059#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000060#include <linux/compiler.h>
61
62/*
63 * Pointer to initial global data area
64 *
65 * Here we initialize it if needed.
66 */
67#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68#undef XTRN_DECLARE_GLOBAL_DATA_PTR
69#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71#else
72DECLARE_GLOBAL_DATA_PTR;
73#endif
74
75/*
Simon Glass4c509342015-04-28 20:25:03 -060076 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000077 * refactored to a single function, something like:
78 *
79 * void led_set_state(enum led_colour_t colour, int on);
80 */
81/************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
85 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020086__weak void coloured_LED_init(void) {}
87__weak void red_led_on(void) {}
88__weak void red_led_off(void) {}
89__weak void green_led_on(void) {}
90__weak void green_led_off(void) {}
91__weak void yellow_led_on(void) {}
92__weak void yellow_led_off(void) {}
93__weak void blue_led_on(void) {}
94__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000095
96/*
97 * Why is gd allocated a register? Prior to reloc it might be better to
98 * just pass it around to each function in this file?
99 *
100 * After reloc one could argue that it is hardly used and doesn't need
101 * to be in a register. Or if it is it should perhaps hold pointers to all
102 * global data for all modules, so that post-reloc we can avoid the massive
103 * literal pool we get on ARM. Or perhaps just encourage each module to use
104 * a structure...
105 */
106
107/*
108 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 */
110
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800111#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000112static int init_func_watchdog_init(void)
113{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800114# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
117 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800118 hw_watchdog_init();
119# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000120 puts(" Watchdog enabled\n");
121 WATCHDOG_RESET();
122
123 return 0;
124}
125
126int init_func_watchdog_reset(void)
127{
128 WATCHDOG_RESET();
129
130 return 0;
131}
132#endif /* CONFIG_WATCHDOG */
133
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200134__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000135{
136 /* please define platform specific board_add_ram_info() */
137}
138
Simon Glass1938f4a2013-03-11 06:49:53 +0000139static int init_baud_rate(void)
140{
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 return 0;
143}
144
145static int display_text_info(void)
146{
Ben Stoltz9b217492015-07-31 09:31:37 -0600147#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100148 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000149
Simon Glass632efa72013-03-11 07:06:48 +0000150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100152
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800153#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100154 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800155#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100156 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800157#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100158
159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
160 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000161#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000162
163#ifdef CONFIG_MODEM_SUPPORT
164 debug("Modem Support enabled\n");
165#endif
166#ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
169#endif
170
171 return 0;
172}
173
174static int announce_dram_init(void)
175{
176 puts("DRAM: ");
177 return 0;
178}
179
angelo@sysam.ite310b932015-02-12 01:40:17 +0100180#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000181static int init_func_ram(void)
182{
183#ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
185#else
186 int board_type = 0; /* use dummy arg */
187#endif
188
189 gd->ram_size = initdram(board_type);
190
191 if (gd->ram_size > 0)
192 return 0;
193
194 puts("*** failed ***\n");
195 return 1;
196}
197#endif
198
Simon Glass1938f4a2013-03-11 06:49:53 +0000199static int show_dram_config(void)
200{
York Sunfa39ffe2014-05-02 17:28:05 -0700201 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000202
203#ifdef CONFIG_NR_DRAM_BANKS
204 int i;
205
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700209 debug("Bank #%d: %llx ", i,
210 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000211#ifdef DEBUG
212 print_size(gd->bd->bi_dram[i].size, "\n");
213#endif
214 }
215 debug("\nDRAM: ");
216#else
217 size = gd->ram_size;
218#endif
219
Simon Glasse4fef6c2013-03-11 14:30:42 +0000220 print_size(size, "");
221 board_add_ram_info(0);
222 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000223
224 return 0;
225}
226
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200227__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000228{
229#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
231 gd->bd->bi_dram[0].size = get_effective_memsize();
232#endif
233}
234
Heiko Schocherea818db2013-01-29 08:53:15 +0100235#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000236static int init_func_i2c(void)
237{
238 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200239#ifdef CONFIG_SYS_I2C
240 i2c_init_all();
241#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200243#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000244 puts("ready\n");
245 return 0;
246}
247#endif
248
249#if defined(CONFIG_HARD_SPI)
250static int init_func_spi(void)
251{
252 puts("SPI: ");
253 spi_init();
254 puts("ready\n");
255 return 0;
256}
257#endif
258
259__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000260static int zero_global_data(void)
261{
262 memset((void *)gd, '\0', sizeof(gd_t));
263
264 return 0;
265}
266
267static int setup_mon_len(void)
268{
Michal Simeke945f6d2014-05-08 16:08:44 +0200269#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600271#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000272 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800273#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800275#elif defined(CONFIG_NDS32)
276 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glass632efa72013-03-11 07:06:48 +0000277#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000278 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
279 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000280#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000281 return 0;
282}
283
284__weak int arch_cpu_init(void)
285{
286 return 0;
287}
288
Simon Glassa733b062013-04-26 02:53:43 +0000289#ifdef CONFIG_SANDBOX
290static int setup_ram_buf(void)
291{
Simon Glass5c2859c2013-11-10 10:27:03 -0700292 struct sandbox_state *state = state_get_current();
293
294 gd->arch.ram_buf = state->ram_buf;
295 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000296
297 return 0;
298}
299#endif
300
Simon Glass1938f4a2013-03-11 06:49:53 +0000301/* Get the top of usable RAM */
302__weak ulong board_get_usable_ram_top(ulong total_size)
303{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700304#ifdef CONFIG_SYS_SDRAM_BASE
305 /*
Simon Glass4c509342015-04-28 20:25:03 -0600306 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700307 * 32-bit address space. If so, clip the usable RAM so it doesn't.
308 */
309 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
310 /*
311 * Will wrap back to top of 32-bit space when reservations
312 * are made.
313 */
314 return 0;
315#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000316 return gd->ram_top;
317}
318
319static int setup_dest_addr(void)
320{
321 debug("Monitor len: %08lX\n", gd->mon_len);
322 /*
323 * Ram is setup, size stored in gd !!
324 */
325 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
326#if defined(CONFIG_SYS_MEM_TOP_HIDE)
327 /*
328 * Subtract specified amount of memory to hide so that it won't
329 * get "touched" at all by U-Boot. By fixing up gd->ram_size
330 * the Linux kernel should now get passed the now "corrected"
331 * memory size and won't touch it either. This should work
332 * for arch/ppc and arch/powerpc. Only Linux board ports in
333 * arch/powerpc with bootwrapper support, that recalculate the
334 * memory size from the SDRAM controller setup will have to
335 * get fixed.
336 */
337 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
338#endif
339#ifdef CONFIG_SYS_SDRAM_BASE
340 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
341#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000342 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000343 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000344 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000345 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700346#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000347 /*
348 * We need to make sure the location we intend to put secondary core
349 * boot code is reserved and not used by any part of u-boot
350 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000351 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
352 gd->relocaddr = determine_mp_bootpg(NULL);
353 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000354 }
355#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000356 return 0;
357}
358
359#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
360static int reserve_logbuffer(void)
361{
362 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000363 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000364 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000365 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000366 return 0;
367}
368#endif
369
370#ifdef CONFIG_PRAM
371/* reserve protected RAM */
372static int reserve_pram(void)
373{
374 ulong reg;
375
376 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000377 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000378 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000379 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000380 return 0;
381}
382#endif /* CONFIG_PRAM */
383
384/* Round memory pointer down to next 4 kB limit */
385static int reserve_round_4k(void)
386{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000387 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000388 return 0;
389}
390
391#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
392 defined(CONFIG_ARM)
393static int reserve_mmu(void)
394{
395 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800396 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000397 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000398
399 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000400 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000401
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000402 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000403 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
404 gd->arch.tlb_addr + gd->arch.tlb_size);
405 return 0;
406}
407#endif
408
409#ifdef CONFIG_LCD
410static int reserve_lcd(void)
411{
412#ifdef CONFIG_FB_ADDR
413 gd->fb_base = CONFIG_FB_ADDR;
414#else
415 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000416 gd->relocaddr = lcd_setmem(gd->relocaddr);
417 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000418#endif /* CONFIG_FB_ADDR */
419 return 0;
420}
421#endif /* CONFIG_LCD */
422
Simon Glass71c52db2013-06-11 11:14:42 -0700423static int reserve_trace(void)
424{
425#ifdef CONFIG_TRACE
426 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
427 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
428 debug("Reserving %dk for trace data at: %08lx\n",
429 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
430#endif
431
432 return 0;
433}
434
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800435#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
436 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100437 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000438static int reserve_video(void)
439{
440 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000441 gd->relocaddr = video_setmem(gd->relocaddr);
442 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000443
444 return 0;
445}
446#endif
447
Simon Glass1938f4a2013-03-11 06:49:53 +0000448static int reserve_uboot(void)
449{
450 /*
451 * reserve memory for U-Boot code, data & bss
452 * round down to next 4 kB limit
453 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000454 gd->relocaddr -= gd->mon_len;
455 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000456#ifdef CONFIG_E500
457 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000458 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000459#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000460
461 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000462 gd->relocaddr);
463
464 gd->start_addr_sp = gd->relocaddr;
465
Simon Glass1938f4a2013-03-11 06:49:53 +0000466 return 0;
467}
468
Simon Glass8cae8a62013-03-05 14:39:45 +0000469#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000470/* reserve memory for malloc() area */
471static int reserve_malloc(void)
472{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000473 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000474 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000475 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000476 return 0;
477}
478
479/* (permanently) allocate a Board Info struct */
480static int reserve_board(void)
481{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800482 if (!gd->bd) {
483 gd->start_addr_sp -= sizeof(bd_t);
484 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
485 memset(gd->bd, '\0', sizeof(bd_t));
486 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
487 sizeof(bd_t), gd->start_addr_sp);
488 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000489 return 0;
490}
Simon Glass8cae8a62013-03-05 14:39:45 +0000491#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000492
493static int setup_machine(void)
494{
495#ifdef CONFIG_MACH_TYPE
496 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
497#endif
498 return 0;
499}
500
501static int reserve_global_data(void)
502{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000503 gd->start_addr_sp -= sizeof(gd_t);
504 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000505 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000506 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000507 return 0;
508}
509
510static int reserve_fdt(void)
511{
512 /*
Simon Glass4c509342015-04-28 20:25:03 -0600513 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000514 * must relocate it. If it is embedded in the data section, then it
515 * will be relocated with other data.
516 */
517 if (gd->fdt_blob) {
518 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
519
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000520 gd->start_addr_sp -= gd->fdt_size;
521 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000522 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000523 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000524 }
525
526 return 0;
527}
528
Andreas Bießmann68145d42015-02-06 23:06:45 +0100529int arch_reserve_stacks(void)
530{
531 return 0;
532}
533
Simon Glass1938f4a2013-03-11 06:49:53 +0000534static int reserve_stacks(void)
535{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100536 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000537 gd->start_addr_sp -= 16;
538 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000539
540 /*
Simon Glass4c509342015-04-28 20:25:03 -0600541 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100542 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000543 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100544 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000545}
546
547static int display_new_sp(void)
548{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000549 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000550
551 return 0;
552}
553
angelo@sysam.ite310b932015-02-12 01:40:17 +0100554#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000555static int setup_board_part1(void)
556{
557 bd_t *bd = gd->bd;
558
559 /*
560 * Save local variables to board info struct
561 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000562 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
563 bd->bi_memsize = gd->ram_size; /* size in bytes */
564
565#ifdef CONFIG_SYS_SRAM_BASE
566 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
567 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
568#endif
569
Masahiro Yamada58dac322014-03-05 17:40:10 +0900570#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000571 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
572 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
573#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100574#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000575 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
576#endif
577#if defined(CONFIG_MPC83xx)
578 bd->bi_immrbar = CONFIG_SYS_IMMR;
579#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000580
581 return 0;
582}
583
584static int setup_board_part2(void)
585{
586 bd_t *bd = gd->bd;
587
588 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
589 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
590#if defined(CONFIG_CPM2)
591 bd->bi_cpmfreq = gd->arch.cpm_clk;
592 bd->bi_brgfreq = gd->arch.brg_clk;
593 bd->bi_sccfreq = gd->arch.scc_clk;
594 bd->bi_vco = gd->arch.vco_out;
595#endif /* CONFIG_CPM2 */
596#if defined(CONFIG_MPC512X)
597 bd->bi_ipsfreq = gd->arch.ips_clk;
598#endif /* CONFIG_MPC512X */
599#if defined(CONFIG_MPC5xxx)
600 bd->bi_ipbfreq = gd->arch.ipb_clk;
601 bd->bi_pcifreq = gd->pci_clk;
602#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800603#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
604 bd->bi_pcifreq = gd->pci_clk;
605#endif
606#if defined(CONFIG_EXTRA_CLOCK)
607 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
608 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
609 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
610#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000611
612 return 0;
613}
614#endif
615
616#ifdef CONFIG_SYS_EXTBDINFO
617static int setup_board_extra(void)
618{
619 bd_t *bd = gd->bd;
620
621 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
622 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
623 sizeof(bd->bi_r_version));
624
625 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
626 bd->bi_plb_busfreq = gd->bus_clk;
627#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
628 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
629 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
630 bd->bi_pci_busfreq = get_PCI_freq();
631 bd->bi_opbfreq = get_OPB_freq();
632#elif defined(CONFIG_XILINX_405)
633 bd->bi_pci_busfreq = get_PCI_freq();
634#endif
635
636 return 0;
637}
638#endif
639
Simon Glass1938f4a2013-03-11 06:49:53 +0000640#ifdef CONFIG_POST
641static int init_post(void)
642{
643 post_bootmode_init();
644 post_run(NULL, POST_ROM | post_bootmode_get(0));
645
646 return 0;
647}
648#endif
649
Simon Glass1938f4a2013-03-11 06:49:53 +0000650static int setup_dram_config(void)
651{
652 /* Ram is board specific, so move it to board code ... */
653 dram_init_banksize();
654
655 return 0;
656}
657
658static int reloc_fdt(void)
659{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600660 if (gd->flags & GD_FLG_SKIP_RELOC)
661 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000662 if (gd->new_fdt) {
663 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
664 gd->fdt_blob = gd->new_fdt;
665 }
666
667 return 0;
668}
669
670static int setup_reloc(void)
671{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600672 if (gd->flags & GD_FLG_SKIP_RELOC) {
673 debug("Skipping relocation due to flag\n");
674 return 0;
675 }
676
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800677#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000678 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100679#ifdef CONFIG_M68K
680 /*
681 * On all ColdFire arch cpu, monitor code starts always
682 * just after the default vector table location, so at 0x400
683 */
684 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
685#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800686#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000687 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
688
689 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000690 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000691 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
692 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000693
694 return 0;
695}
696
697/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700698#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000699
700static int jump_to_copy(void)
701{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600702 if (gd->flags & GD_FLG_SKIP_RELOC)
703 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000704 /*
705 * x86 is special, but in a nice way. It uses a trampoline which
706 * enables the dcache if possible.
707 *
708 * For now, other archs use relocate_code(), which is implemented
709 * similarly for all archs. When we do generic relocation, hopefully
710 * we can make all archs enable the dcache prior to relocation.
711 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300712#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000713 /*
714 * SDRAM and console are now initialised. The final stack can now
715 * be setup in SDRAM. Code execution will continue in Flash, but
716 * with the stack in SDRAM and Global Data in temporary memory
717 * (CPU cache)
718 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600719 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000720 board_init_f_r_trampoline(gd->start_addr_sp);
721#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000722 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000723#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000724
725 return 0;
726}
727#endif
728
729/* Record the board_init_f() bootstage (after arch_cpu_init()) */
730static int mark_bootstage(void)
731{
732 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
733
734 return 0;
735}
736
Simon Glassab7cd622014-07-23 06:55:04 -0600737static int initf_dm(void)
738{
739#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
740 int ret;
741
742 ret = dm_init_and_scan(true);
743 if (ret)
744 return ret;
745#endif
746
747 return 0;
748}
749
Simon Glass146251f2015-01-19 22:16:12 -0700750/* Architecture-specific memory reservation */
751__weak int reserve_arch(void)
752{
753 return 0;
754}
755
Simon Glassd4c671c2015-03-05 12:25:16 -0700756__weak int arch_cpu_init_dm(void)
757{
758 return 0;
759}
760
Simon Glass1938f4a2013-03-11 06:49:53 +0000761static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000762#ifdef CONFIG_SANDBOX
763 setup_ram_buf,
764#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000765 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700766#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700767 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700768#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800769#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700770 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800771#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700772 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000773#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
774 /* TODO: can this go into arch_cpu_init()? */
775 probecpu,
776#endif
Bin Menga52a068e2015-08-20 06:40:18 -0700777#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
778 x86_fsp_init,
779#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000780 arch_cpu_init, /* basic arch cpu dependent setup */
781 mark_bootstage,
Simon Glass3ea09532014-09-03 17:36:59 -0600782 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700783 arch_cpu_init_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000784#if defined(CONFIG_BOARD_EARLY_INIT_F)
785 board_early_init_f,
786#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000787 /* TODO: can any of this go into arch_cpu_init()? */
788#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
789 get_clocks, /* get CPU and bus clocks (etc.) */
790#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
791 && !defined(CONFIG_TQM885D)
792 adjust_sdram_tbs_8xx,
793#endif
794 /* TODO: can we rename this to timer_init()? */
795 init_timebase,
796#endif
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800797#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
Thomas Choua54915d2015-10-22 22:28:53 +0800798 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000799 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000800#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000801#ifdef CONFIG_SYS_ALLOC_DPRAM
802#if !defined(CONFIG_CPM2)
803 dpram_init,
804#endif
805#endif
806#if defined(CONFIG_BOARD_POSTCLK_INIT)
807 board_postclk_init,
808#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000809#ifdef CONFIG_FSL_ESDHC
810 get_clocks,
811#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100812#ifdef CONFIG_M68K
813 get_clocks,
814#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000815 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000816#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
817 /* get CPU and bus clocks according to the environment variable */
818 get_clocks_866,
819 /* adjust sdram refresh rate according to the new clock */
820 sdram_adjust_866,
821 init_timebase,
822#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000823 init_baud_rate, /* initialze baudrate settings */
824 serial_init, /* serial communications setup */
825 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000826#ifdef CONFIG_SANDBOX
827 sandbox_early_getopt_check,
828#endif
829#ifdef CONFIG_OF_CONTROL
830 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000831#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000832 display_options, /* say that we are here */
833 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900834#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000835 prt_8260_rsr,
836 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900837#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000838#if defined(CONFIG_MPC83xx)
839 prt_83xx_rsr,
840#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100841#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000842 checkcpu,
843#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000844 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000845#if defined(CONFIG_MPC5xxx)
846 prt_mpc5xxx_clks,
847#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000848#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900849 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000850#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000851 INIT_FUNC_WATCHDOG_INIT
852#if defined(CONFIG_MISC_INIT_F)
853 misc_init_f,
854#endif
855 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100856#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000857 init_func_i2c,
858#endif
859#if defined(CONFIG_HARD_SPI)
860 init_func_spi,
861#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000862 announce_dram_init,
863 /* TODO: unify all these dram functions? */
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800864#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
865 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000866 dram_init, /* configure available RAM banks */
867#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100868#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000869 init_func_ram,
870#endif
871#ifdef CONFIG_POST
872 post_init_f,
873#endif
874 INIT_FUNC_WATCHDOG_RESET
875#if defined(CONFIG_SYS_DRAM_TEST)
876 testdram,
877#endif /* CONFIG_SYS_DRAM_TEST */
878 INIT_FUNC_WATCHDOG_RESET
879
Simon Glass1938f4a2013-03-11 06:49:53 +0000880#ifdef CONFIG_POST
881 init_post,
882#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000883 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000884 /*
885 * Now that we have DRAM mapped and working, we can
886 * relocate the code and continue running from DRAM.
887 *
888 * Reserve memory at end of RAM for (top down in that order):
889 * - area that won't get touched by U-Boot and Linux (optional)
890 * - kernel log buffer
891 * - protected RAM
892 * - LCD framebuffer
893 * - monitor code
894 * - board info struct
895 */
896 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800897#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800898 /* Blackfin u-boot monitor should be on top of the ram */
899 reserve_uboot,
900#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000901#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
902 reserve_logbuffer,
903#endif
904#ifdef CONFIG_PRAM
905 reserve_pram,
906#endif
907 reserve_round_4k,
908#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
909 defined(CONFIG_ARM)
910 reserve_mmu,
911#endif
912#ifdef CONFIG_LCD
913 reserve_lcd,
914#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700915 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000916 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800917#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
918 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100919 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000920 reserve_video,
921#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800922#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000923 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800924#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000925#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000926 reserve_malloc,
927 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000928#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000929 setup_machine,
930 reserve_global_data,
931 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700932 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000933 reserve_stacks,
934 setup_dram_config,
935 show_dram_config,
angelo@sysam.ite310b932015-02-12 01:40:17 +0100936#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000937 setup_board_part1,
938 INIT_FUNC_WATCHDOG_RESET
939 setup_board_part2,
940#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000941 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000942#ifdef CONFIG_SYS_EXTBDINFO
943 setup_board_extra,
944#endif
945 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000946 reloc_fdt,
947 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300948#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700949 copy_uboot_to_ram,
950 clear_bss,
951 do_elf_reloc_fixups,
952#endif
Simon Glass808434c2013-11-10 10:26:59 -0700953#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000954 jump_to_copy,
955#endif
956 NULL,
957};
958
959void board_init_f(ulong boot_flags)
960{
York Sun2a1680e2014-05-02 17:28:04 -0700961#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
962 /*
963 * For some archtectures, global data is initialized and used before
964 * calling this function. The data should be preserved. For others,
965 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
966 * here to host global data until relocation.
967 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000968 gd_t data;
969
970 gd = &data;
971
David Fengcce6be72013-12-14 11:47:36 +0800972 /*
973 * Clear global data before it is accessed at debug print
974 * in initcall_run_list. Otherwise the debug print probably
975 * get the wrong vaule of gd->have_console.
976 */
David Fengcce6be72013-12-14 11:47:36 +0800977 zero_global_data();
978#endif
979
Simon Glass1938f4a2013-03-11 06:49:53 +0000980 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400981 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000982
983 if (initcall_run_list(init_sequence_f))
984 hang();
985
Ben Stoltz9b217492015-07-31 09:31:37 -0600986#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
987 !defined(CONFIG_EFI_APP)
Simon Glass1938f4a2013-03-11 06:49:53 +0000988 /* NOTREACHED - jump_to_copy() does not return */
989 hang();
990#endif
991}
992
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300993#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000994/*
995 * For now this code is only used on x86.
996 *
997 * init_sequence_f_r is the list of init functions which are run when
998 * U-Boot is executing from Flash with a semi-limited 'C' environment.
999 * The following limitations must be considered when implementing an
1000 * '_f_r' function:
1001 * - 'static' variables are read-only
1002 * - Global Data (gd->xxx) is read/write
1003 *
1004 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1005 * supported). It _should_, if possible, copy global data to RAM and
1006 * initialise the CPU caches (to speed up the relocation process)
1007 *
1008 * NOTE: At present only x86 uses this route, but it is intended that
1009 * all archs will move to this when generic relocation is implemented.
1010 */
1011static init_fnc_t init_sequence_f_r[] = {
1012 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001013
1014 NULL,
1015};
1016
1017void board_init_f_r(void)
1018{
1019 if (initcall_run_list(init_sequence_f_r))
1020 hang();
1021
1022 /*
1023 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1024 * Transfer execution from Flash to RAM by calculating the address
1025 * of the in-RAM copy of board_init_r() and calling it
1026 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001027 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001028
1029 /* NOTREACHED - board_init_r() does not return */
1030 hang();
1031}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001032#endif /* CONFIG_X86 */
1033
Simon Glass1fed87d2015-08-10 20:44:30 -06001034/* Unfortunately x86 can't compile this code as gd cannot be assigned */
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001035#ifndef CONFIG_X86
Simon Glass1fed87d2015-08-10 20:44:30 -06001036__weak void arch_setup_gd(struct global_data *gd_ptr)
1037{
1038 gd = gd_ptr;
1039}
Simon Glassf0c7d9c2015-08-10 20:44:32 -06001040#endif /* !CONFIG_X86 */
Simon Glass1fed87d2015-08-10 20:44:30 -06001041
Simon Glass74d01862015-02-07 11:51:34 -07001042ulong board_init_f_mem(ulong top)
1043{
Simon Glass1fed87d2015-08-10 20:44:30 -06001044 struct global_data *gd_ptr;
1045
Simon Glass74d01862015-02-07 11:51:34 -07001046 /* Leave space for the stack we are running with now */
1047 top -= 0x40;
1048
1049 top -= sizeof(struct global_data);
1050 top = ALIGN(top, 16);
Simon Glass1fed87d2015-08-10 20:44:30 -06001051 gd_ptr = (struct global_data *)top;
1052 memset(gd_ptr, '\0', sizeof(*gd));
1053 arch_setup_gd(gd_ptr);
Simon Glass74d01862015-02-07 11:51:34 -07001054
1055#ifdef CONFIG_SYS_MALLOC_F_LEN
1056 top -= CONFIG_SYS_MALLOC_F_LEN;
1057 gd->malloc_base = top;
1058#endif
1059
1060 return top;
1061}