blob: 6d922b8c86bdb3d28001eabc13128f8f15f5bb7d [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070026#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050027#include <mapmem.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028
29/* TODO: Can we move these into arch/ headers? */
30#ifdef CONFIG_8xx
31#include <mpc8xx.h>
32#endif
33#ifdef CONFIG_5xx
34#include <mpc5xx.h>
35#endif
36#ifdef CONFIG_MPC5xxx
37#include <mpc5xxx.h>
38#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070039#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070040#include <asm/mp.h>
41#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000042
Simon Glassa733b062013-04-26 02:53:43 +000043#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000044#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000045#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020046#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070047#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000048#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000049#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000050#include <asm/io.h>
51#include <asm/sections.h>
Alexey Brodkin3fb80162015-02-24 19:40:36 +030052#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +000053#include <asm/init_helpers.h>
54#include <asm/relocate.h>
55#endif
Simon Glassa733b062013-04-26 02:53:43 +000056#ifdef CONFIG_SANDBOX
57#include <asm/state.h>
58#endif
Simon Glassab7cd622014-07-23 06:55:04 -060059#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000060#include <linux/compiler.h>
61
62/*
63 * Pointer to initial global data area
64 *
65 * Here we initialize it if needed.
66 */
67#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68#undef XTRN_DECLARE_GLOBAL_DATA_PTR
69#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71#else
72DECLARE_GLOBAL_DATA_PTR;
73#endif
74
75/*
Simon Glass4c509342015-04-28 20:25:03 -060076 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000077 * refactored to a single function, something like:
78 *
79 * void led_set_state(enum led_colour_t colour, int on);
80 */
81/************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
85 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020086__weak void coloured_LED_init(void) {}
87__weak void red_led_on(void) {}
88__weak void red_led_off(void) {}
89__weak void green_led_on(void) {}
90__weak void green_led_off(void) {}
91__weak void yellow_led_on(void) {}
92__weak void yellow_led_off(void) {}
93__weak void blue_led_on(void) {}
94__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000095
96/*
97 * Why is gd allocated a register? Prior to reloc it might be better to
98 * just pass it around to each function in this file?
99 *
100 * After reloc one could argue that it is hardly used and doesn't need
101 * to be in a register. Or if it is it should perhaps hold pointers to all
102 * global data for all modules, so that post-reloc we can avoid the massive
103 * literal pool we get on ARM. Or perhaps just encourage each module to use
104 * a structure...
105 */
106
107/*
108 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 */
110
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800111#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000112static int init_func_watchdog_init(void)
113{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800114# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
117 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800118 hw_watchdog_init();
119# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000120 puts(" Watchdog enabled\n");
121 WATCHDOG_RESET();
122
123 return 0;
124}
125
126int init_func_watchdog_reset(void)
127{
128 WATCHDOG_RESET();
129
130 return 0;
131}
132#endif /* CONFIG_WATCHDOG */
133
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200134__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000135{
136 /* please define platform specific board_add_ram_info() */
137}
138
Simon Glass1938f4a2013-03-11 06:49:53 +0000139static int init_baud_rate(void)
140{
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 return 0;
143}
144
145static int display_text_info(void)
146{
Ben Stoltz9b217492015-07-31 09:31:37 -0600147#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100148 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000149
Simon Glass632efa72013-03-11 07:06:48 +0000150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100152
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800153#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100154 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800155#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100156 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800157#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100158
159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
160 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000161#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000162
163#ifdef CONFIG_MODEM_SUPPORT
164 debug("Modem Support enabled\n");
165#endif
166#ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
169#endif
170
171 return 0;
172}
173
174static int announce_dram_init(void)
175{
176 puts("DRAM: ");
177 return 0;
178}
179
angelo@sysam.ite310b932015-02-12 01:40:17 +0100180#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000181static int init_func_ram(void)
182{
183#ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
185#else
186 int board_type = 0; /* use dummy arg */
187#endif
188
189 gd->ram_size = initdram(board_type);
190
191 if (gd->ram_size > 0)
192 return 0;
193
194 puts("*** failed ***\n");
195 return 1;
196}
197#endif
198
Simon Glass1938f4a2013-03-11 06:49:53 +0000199static int show_dram_config(void)
200{
York Sunfa39ffe2014-05-02 17:28:05 -0700201 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000202
203#ifdef CONFIG_NR_DRAM_BANKS
204 int i;
205
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
209 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
210#ifdef DEBUG
211 print_size(gd->bd->bi_dram[i].size, "\n");
212#endif
213 }
214 debug("\nDRAM: ");
215#else
216 size = gd->ram_size;
217#endif
218
Simon Glasse4fef6c2013-03-11 14:30:42 +0000219 print_size(size, "");
220 board_add_ram_info(0);
221 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000222
223 return 0;
224}
225
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200226__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000227{
228#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
229 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
230 gd->bd->bi_dram[0].size = get_effective_memsize();
231#endif
232}
233
Heiko Schocherea818db2013-01-29 08:53:15 +0100234#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000235static int init_func_i2c(void)
236{
237 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200238#ifdef CONFIG_SYS_I2C
239 i2c_init_all();
240#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000241 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200242#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000243 puts("ready\n");
244 return 0;
245}
246#endif
247
248#if defined(CONFIG_HARD_SPI)
249static int init_func_spi(void)
250{
251 puts("SPI: ");
252 spi_init();
253 puts("ready\n");
254 return 0;
255}
256#endif
257
258__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000259static int zero_global_data(void)
260{
261 memset((void *)gd, '\0', sizeof(gd_t));
262
263 return 0;
264}
265
266static int setup_mon_len(void)
267{
Michal Simeke945f6d2014-05-08 16:08:44 +0200268#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100269 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600270#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000271 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800272#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800273 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000274#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000275 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
276 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000277#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000278 return 0;
279}
280
281__weak int arch_cpu_init(void)
282{
283 return 0;
284}
285
Simon Glassa733b062013-04-26 02:53:43 +0000286#ifdef CONFIG_SANDBOX
287static int setup_ram_buf(void)
288{
Simon Glass5c2859c2013-11-10 10:27:03 -0700289 struct sandbox_state *state = state_get_current();
290
291 gd->arch.ram_buf = state->ram_buf;
292 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000293
294 return 0;
295}
296#endif
297
Simon Glass1938f4a2013-03-11 06:49:53 +0000298/* Get the top of usable RAM */
299__weak ulong board_get_usable_ram_top(ulong total_size)
300{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700301#ifdef CONFIG_SYS_SDRAM_BASE
302 /*
Simon Glass4c509342015-04-28 20:25:03 -0600303 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700304 * 32-bit address space. If so, clip the usable RAM so it doesn't.
305 */
306 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
307 /*
308 * Will wrap back to top of 32-bit space when reservations
309 * are made.
310 */
311 return 0;
312#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000313 return gd->ram_top;
314}
315
316static int setup_dest_addr(void)
317{
318 debug("Monitor len: %08lX\n", gd->mon_len);
319 /*
320 * Ram is setup, size stored in gd !!
321 */
322 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
323#if defined(CONFIG_SYS_MEM_TOP_HIDE)
324 /*
325 * Subtract specified amount of memory to hide so that it won't
326 * get "touched" at all by U-Boot. By fixing up gd->ram_size
327 * the Linux kernel should now get passed the now "corrected"
328 * memory size and won't touch it either. This should work
329 * for arch/ppc and arch/powerpc. Only Linux board ports in
330 * arch/powerpc with bootwrapper support, that recalculate the
331 * memory size from the SDRAM controller setup will have to
332 * get fixed.
333 */
334 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
335#endif
336#ifdef CONFIG_SYS_SDRAM_BASE
337 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
338#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000339 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000340 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000341 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000342 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700343#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000344 /*
345 * We need to make sure the location we intend to put secondary core
346 * boot code is reserved and not used by any part of u-boot
347 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000348 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
349 gd->relocaddr = determine_mp_bootpg(NULL);
350 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000351 }
352#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 return 0;
354}
355
356#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
357static int reserve_logbuffer(void)
358{
359 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000360 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000361 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000362 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000363 return 0;
364}
365#endif
366
367#ifdef CONFIG_PRAM
368/* reserve protected RAM */
369static int reserve_pram(void)
370{
371 ulong reg;
372
373 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000374 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000375 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000376 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000377 return 0;
378}
379#endif /* CONFIG_PRAM */
380
381/* Round memory pointer down to next 4 kB limit */
382static int reserve_round_4k(void)
383{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000384 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000385 return 0;
386}
387
388#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
389 defined(CONFIG_ARM)
390static int reserve_mmu(void)
391{
392 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800393 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000394 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000395
396 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000397 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000398
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000399 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000400 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
401 gd->arch.tlb_addr + gd->arch.tlb_size);
402 return 0;
403}
404#endif
405
406#ifdef CONFIG_LCD
407static int reserve_lcd(void)
408{
409#ifdef CONFIG_FB_ADDR
410 gd->fb_base = CONFIG_FB_ADDR;
411#else
412 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000413 gd->relocaddr = lcd_setmem(gd->relocaddr);
414 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000415#endif /* CONFIG_FB_ADDR */
416 return 0;
417}
418#endif /* CONFIG_LCD */
419
Simon Glass71c52db2013-06-11 11:14:42 -0700420static int reserve_trace(void)
421{
422#ifdef CONFIG_TRACE
423 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
424 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
425 debug("Reserving %dk for trace data at: %08lx\n",
426 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
427#endif
428
429 return 0;
430}
431
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800432#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
433 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100434 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000435static int reserve_video(void)
436{
437 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000438 gd->relocaddr = video_setmem(gd->relocaddr);
439 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000440
441 return 0;
442}
443#endif
444
Simon Glass1938f4a2013-03-11 06:49:53 +0000445static int reserve_uboot(void)
446{
447 /*
448 * reserve memory for U-Boot code, data & bss
449 * round down to next 4 kB limit
450 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000451 gd->relocaddr -= gd->mon_len;
452 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000453#ifdef CONFIG_E500
454 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000455 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000456#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000457
458 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000459 gd->relocaddr);
460
461 gd->start_addr_sp = gd->relocaddr;
462
Simon Glass1938f4a2013-03-11 06:49:53 +0000463 return 0;
464}
465
Simon Glass8cae8a62013-03-05 14:39:45 +0000466#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000467/* reserve memory for malloc() area */
468static int reserve_malloc(void)
469{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000470 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000471 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000472 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000473 return 0;
474}
475
476/* (permanently) allocate a Board Info struct */
477static int reserve_board(void)
478{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800479 if (!gd->bd) {
480 gd->start_addr_sp -= sizeof(bd_t);
481 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
482 memset(gd->bd, '\0', sizeof(bd_t));
483 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
484 sizeof(bd_t), gd->start_addr_sp);
485 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000486 return 0;
487}
Simon Glass8cae8a62013-03-05 14:39:45 +0000488#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000489
490static int setup_machine(void)
491{
492#ifdef CONFIG_MACH_TYPE
493 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
494#endif
495 return 0;
496}
497
498static int reserve_global_data(void)
499{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000500 gd->start_addr_sp -= sizeof(gd_t);
501 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000502 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000503 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000504 return 0;
505}
506
507static int reserve_fdt(void)
508{
509 /*
Simon Glass4c509342015-04-28 20:25:03 -0600510 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000511 * must relocate it. If it is embedded in the data section, then it
512 * will be relocated with other data.
513 */
514 if (gd->fdt_blob) {
515 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
516
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000517 gd->start_addr_sp -= gd->fdt_size;
518 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000519 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000520 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000521 }
522
523 return 0;
524}
525
Andreas Bießmann68145d42015-02-06 23:06:45 +0100526int arch_reserve_stacks(void)
527{
528 return 0;
529}
530
Simon Glass1938f4a2013-03-11 06:49:53 +0000531static int reserve_stacks(void)
532{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100533 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000534 gd->start_addr_sp -= 16;
535 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000536
537 /*
Simon Glass4c509342015-04-28 20:25:03 -0600538 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100539 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000540 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100541 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000542}
543
544static int display_new_sp(void)
545{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000546 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000547
548 return 0;
549}
550
angelo@sysam.ite310b932015-02-12 01:40:17 +0100551#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000552static int setup_board_part1(void)
553{
554 bd_t *bd = gd->bd;
555
556 /*
557 * Save local variables to board info struct
558 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000559 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
560 bd->bi_memsize = gd->ram_size; /* size in bytes */
561
562#ifdef CONFIG_SYS_SRAM_BASE
563 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
564 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
565#endif
566
Masahiro Yamada58dac322014-03-05 17:40:10 +0900567#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000568 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
569 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
570#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100571#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000572 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
573#endif
574#if defined(CONFIG_MPC83xx)
575 bd->bi_immrbar = CONFIG_SYS_IMMR;
576#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000577
578 return 0;
579}
580
581static int setup_board_part2(void)
582{
583 bd_t *bd = gd->bd;
584
585 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
586 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
587#if defined(CONFIG_CPM2)
588 bd->bi_cpmfreq = gd->arch.cpm_clk;
589 bd->bi_brgfreq = gd->arch.brg_clk;
590 bd->bi_sccfreq = gd->arch.scc_clk;
591 bd->bi_vco = gd->arch.vco_out;
592#endif /* CONFIG_CPM2 */
593#if defined(CONFIG_MPC512X)
594 bd->bi_ipsfreq = gd->arch.ips_clk;
595#endif /* CONFIG_MPC512X */
596#if defined(CONFIG_MPC5xxx)
597 bd->bi_ipbfreq = gd->arch.ipb_clk;
598 bd->bi_pcifreq = gd->pci_clk;
599#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800600#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
601 bd->bi_pcifreq = gd->pci_clk;
602#endif
603#if defined(CONFIG_EXTRA_CLOCK)
604 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
605 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
606 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
607#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000608
609 return 0;
610}
611#endif
612
613#ifdef CONFIG_SYS_EXTBDINFO
614static int setup_board_extra(void)
615{
616 bd_t *bd = gd->bd;
617
618 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
619 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
620 sizeof(bd->bi_r_version));
621
622 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
623 bd->bi_plb_busfreq = gd->bus_clk;
624#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
625 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
626 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
627 bd->bi_pci_busfreq = get_PCI_freq();
628 bd->bi_opbfreq = get_OPB_freq();
629#elif defined(CONFIG_XILINX_405)
630 bd->bi_pci_busfreq = get_PCI_freq();
631#endif
632
633 return 0;
634}
635#endif
636
Simon Glass1938f4a2013-03-11 06:49:53 +0000637#ifdef CONFIG_POST
638static int init_post(void)
639{
640 post_bootmode_init();
641 post_run(NULL, POST_ROM | post_bootmode_get(0));
642
643 return 0;
644}
645#endif
646
Simon Glass1938f4a2013-03-11 06:49:53 +0000647static int setup_dram_config(void)
648{
649 /* Ram is board specific, so move it to board code ... */
650 dram_init_banksize();
651
652 return 0;
653}
654
655static int reloc_fdt(void)
656{
657 if (gd->new_fdt) {
658 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
659 gd->fdt_blob = gd->new_fdt;
660 }
661
662 return 0;
663}
664
665static int setup_reloc(void)
666{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800667#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000668 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100669#ifdef CONFIG_M68K
670 /*
671 * On all ColdFire arch cpu, monitor code starts always
672 * just after the default vector table location, so at 0x400
673 */
674 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
675#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800676#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000677 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
678
679 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000680 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000681 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
682 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000683
684 return 0;
685}
686
687/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700688#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000689
690static int jump_to_copy(void)
691{
Simon Glass48a33802013-03-05 14:39:52 +0000692 /*
693 * x86 is special, but in a nice way. It uses a trampoline which
694 * enables the dcache if possible.
695 *
696 * For now, other archs use relocate_code(), which is implemented
697 * similarly for all archs. When we do generic relocation, hopefully
698 * we can make all archs enable the dcache prior to relocation.
699 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300700#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000701 /*
702 * SDRAM and console are now initialised. The final stack can now
703 * be setup in SDRAM. Code execution will continue in Flash, but
704 * with the stack in SDRAM and Global Data in temporary memory
705 * (CPU cache)
706 */
707 board_init_f_r_trampoline(gd->start_addr_sp);
708#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000709 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000710#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000711
712 return 0;
713}
714#endif
715
716/* Record the board_init_f() bootstage (after arch_cpu_init()) */
717static int mark_bootstage(void)
718{
719 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
720
721 return 0;
722}
723
Simon Glassab7cd622014-07-23 06:55:04 -0600724static int initf_dm(void)
725{
726#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
727 int ret;
728
729 ret = dm_init_and_scan(true);
730 if (ret)
731 return ret;
732#endif
733
734 return 0;
735}
736
Simon Glass146251f2015-01-19 22:16:12 -0700737/* Architecture-specific memory reservation */
738__weak int reserve_arch(void)
739{
740 return 0;
741}
742
Simon Glassd4c671c2015-03-05 12:25:16 -0700743__weak int arch_cpu_init_dm(void)
744{
745 return 0;
746}
747
Simon Glass1938f4a2013-03-11 06:49:53 +0000748static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000749#ifdef CONFIG_SANDBOX
750 setup_ram_buf,
751#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000752 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700753#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700754 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700755#endif
Bin Mengaefaff82015-06-07 11:33:14 +0800756#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
757 x86_fsp_init,
758#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800759#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700760 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800761#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700762 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000763#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
764 /* TODO: can this go into arch_cpu_init()? */
765 probecpu,
766#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000767 arch_cpu_init, /* basic arch cpu dependent setup */
768 mark_bootstage,
Simon Glass3ea09532014-09-03 17:36:59 -0600769 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700770 arch_cpu_init_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000771#if defined(CONFIG_BOARD_EARLY_INIT_F)
772 board_early_init_f,
773#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000774 /* TODO: can any of this go into arch_cpu_init()? */
775#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
776 get_clocks, /* get CPU and bus clocks (etc.) */
777#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
778 && !defined(CONFIG_TQM885D)
779 adjust_sdram_tbs_8xx,
780#endif
781 /* TODO: can we rename this to timer_init()? */
782 init_timebase,
783#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800784#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000785 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000786#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000787#ifdef CONFIG_SYS_ALLOC_DPRAM
788#if !defined(CONFIG_CPM2)
789 dpram_init,
790#endif
791#endif
792#if defined(CONFIG_BOARD_POSTCLK_INIT)
793 board_postclk_init,
794#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000795#ifdef CONFIG_FSL_ESDHC
796 get_clocks,
797#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100798#ifdef CONFIG_M68K
799 get_clocks,
800#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000801 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000802#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
803 /* get CPU and bus clocks according to the environment variable */
804 get_clocks_866,
805 /* adjust sdram refresh rate according to the new clock */
806 sdram_adjust_866,
807 init_timebase,
808#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000809 init_baud_rate, /* initialze baudrate settings */
810 serial_init, /* serial communications setup */
811 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000812#ifdef CONFIG_SANDBOX
813 sandbox_early_getopt_check,
814#endif
815#ifdef CONFIG_OF_CONTROL
816 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000817#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000818 display_options, /* say that we are here */
819 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900820#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000821 prt_8260_rsr,
822 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900823#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000824#if defined(CONFIG_MPC83xx)
825 prt_83xx_rsr,
826#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100827#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000828 checkcpu,
829#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000830 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000831#if defined(CONFIG_MPC5xxx)
832 prt_mpc5xxx_clks,
833#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000834#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900835 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000836#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000837 INIT_FUNC_WATCHDOG_INIT
838#if defined(CONFIG_MISC_INIT_F)
839 misc_init_f,
840#endif
841 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100842#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000843 init_func_i2c,
844#endif
845#if defined(CONFIG_HARD_SPI)
846 init_func_spi,
847#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000848 announce_dram_init,
849 /* TODO: unify all these dram functions? */
Andreas Bießmanna752a8b2015-02-06 23:06:48 +0100850#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000851 dram_init, /* configure available RAM banks */
852#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100853#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000854 init_func_ram,
855#endif
856#ifdef CONFIG_POST
857 post_init_f,
858#endif
859 INIT_FUNC_WATCHDOG_RESET
860#if defined(CONFIG_SYS_DRAM_TEST)
861 testdram,
862#endif /* CONFIG_SYS_DRAM_TEST */
863 INIT_FUNC_WATCHDOG_RESET
864
Simon Glass1938f4a2013-03-11 06:49:53 +0000865#ifdef CONFIG_POST
866 init_post,
867#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000868 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000869 /*
870 * Now that we have DRAM mapped and working, we can
871 * relocate the code and continue running from DRAM.
872 *
873 * Reserve memory at end of RAM for (top down in that order):
874 * - area that won't get touched by U-Boot and Linux (optional)
875 * - kernel log buffer
876 * - protected RAM
877 * - LCD framebuffer
878 * - monitor code
879 * - board info struct
880 */
881 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800882#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800883 /* Blackfin u-boot monitor should be on top of the ram */
884 reserve_uboot,
885#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000886#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
887 reserve_logbuffer,
888#endif
889#ifdef CONFIG_PRAM
890 reserve_pram,
891#endif
892 reserve_round_4k,
893#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
894 defined(CONFIG_ARM)
895 reserve_mmu,
896#endif
897#ifdef CONFIG_LCD
898 reserve_lcd,
899#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700900 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000901 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800902#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
903 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100904 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000905 reserve_video,
906#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800907#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000908 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800909#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000910#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000911 reserve_malloc,
912 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000913#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000914 setup_machine,
915 reserve_global_data,
916 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700917 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000918 reserve_stacks,
919 setup_dram_config,
920 show_dram_config,
angelo@sysam.ite310b932015-02-12 01:40:17 +0100921#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000922 setup_board_part1,
923 INIT_FUNC_WATCHDOG_RESET
924 setup_board_part2,
925#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000926 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000927#ifdef CONFIG_SYS_EXTBDINFO
928 setup_board_extra,
929#endif
930 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000931 reloc_fdt,
932 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300933#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700934 copy_uboot_to_ram,
935 clear_bss,
936 do_elf_reloc_fixups,
937#endif
Simon Glass808434c2013-11-10 10:26:59 -0700938#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000939 jump_to_copy,
940#endif
941 NULL,
942};
943
944void board_init_f(ulong boot_flags)
945{
York Sun2a1680e2014-05-02 17:28:04 -0700946#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
947 /*
948 * For some archtectures, global data is initialized and used before
949 * calling this function. The data should be preserved. For others,
950 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
951 * here to host global data until relocation.
952 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000953 gd_t data;
954
955 gd = &data;
956
David Fengcce6be72013-12-14 11:47:36 +0800957 /*
958 * Clear global data before it is accessed at debug print
959 * in initcall_run_list. Otherwise the debug print probably
960 * get the wrong vaule of gd->have_console.
961 */
David Fengcce6be72013-12-14 11:47:36 +0800962 zero_global_data();
963#endif
964
Simon Glass1938f4a2013-03-11 06:49:53 +0000965 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400966 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000967
968 if (initcall_run_list(init_sequence_f))
969 hang();
970
Ben Stoltz9b217492015-07-31 09:31:37 -0600971#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
972 !defined(CONFIG_EFI_APP)
Simon Glass1938f4a2013-03-11 06:49:53 +0000973 /* NOTREACHED - jump_to_copy() does not return */
974 hang();
975#endif
976}
977
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300978#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000979/*
980 * For now this code is only used on x86.
981 *
982 * init_sequence_f_r is the list of init functions which are run when
983 * U-Boot is executing from Flash with a semi-limited 'C' environment.
984 * The following limitations must be considered when implementing an
985 * '_f_r' function:
986 * - 'static' variables are read-only
987 * - Global Data (gd->xxx) is read/write
988 *
989 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
990 * supported). It _should_, if possible, copy global data to RAM and
991 * initialise the CPU caches (to speed up the relocation process)
992 *
993 * NOTE: At present only x86 uses this route, but it is intended that
994 * all archs will move to this when generic relocation is implemented.
995 */
996static init_fnc_t init_sequence_f_r[] = {
997 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +0000998
999 NULL,
1000};
1001
1002void board_init_f_r(void)
1003{
1004 if (initcall_run_list(init_sequence_f_r))
1005 hang();
1006
1007 /*
1008 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1009 * Transfer execution from Flash to RAM by calculating the address
1010 * of the in-RAM copy of board_init_r() and calling it
1011 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001012 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001013
1014 /* NOTREACHED - board_init_r() does not return */
1015 hang();
1016}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001017#endif /* CONFIG_X86 */
1018
1019#ifndef CONFIG_X86
Simon Glass74d01862015-02-07 11:51:34 -07001020ulong board_init_f_mem(ulong top)
1021{
1022 /* Leave space for the stack we are running with now */
1023 top -= 0x40;
1024
1025 top -= sizeof(struct global_data);
1026 top = ALIGN(top, 16);
1027 gd = (struct global_data *)top;
1028 memset((void *)gd, '\0', sizeof(*gd));
1029
1030#ifdef CONFIG_SYS_MALLOC_F_LEN
1031 top -= CONFIG_SYS_MALLOC_F_LEN;
1032 gd->malloc_base = top;
1033#endif
1034
1035 return top;
1036}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001037#endif /* !CONFIG_X86 */