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Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05301/*
2 * Copyright 2016 Freescale Semiconductor
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __LS1012A_COMMON_H
8#define __LS1012A_COMMON_H
9
10#define CONFIG_FSL_LAYERSCAPE
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053011#define CONFIG_GICV2
12
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053013#include <asm/arch/config.h>
Bharat Bhushan9f076db2017-03-22 12:06:29 +053014#include <asm/arch/stream_id_lsch2.h>
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053015
16#define CONFIG_SUPPORT_RAW_INITRD
17
18#define CONFIG_DISPLAY_BOARDINFO_LATE
19
20#define CONFIG_SYS_TEXT_BASE 0x40100000
21
Hou Zhiqiang904110c2017-01-10 16:44:15 +080022#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053023
24#define CONFIG_SKIP_LOWLEVEL_INIT
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053025
26#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
27#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
28
29#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
30#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
31#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha7d559602017-01-30 17:05:22 +053032#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053033
34/* Generic Timer Definitions */
Yuantian Tangb5845102017-10-12 14:29:26 +080035#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053036
37/* CSU */
38#define CONFIG_LAYERSCAPE_NS_ACCESS
39
40/* Size of malloc() pool */
41#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
42
43/*SPI device */
44#ifdef CONFIG_QSPI_BOOT
45#define CONFIG_SYS_QE_FW_IN_SPIFLASH
46#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
47#define CONFIG_ENV_SPI_BUS 0
48#define CONFIG_ENV_SPI_CS 0
49#define CONFIG_ENV_SPI_MAX_HZ 1000000
50#define CONFIG_ENV_SPI_MODE 0x03
51#define CONFIG_SPI_FLASH_SPANSION
52#define CONFIG_FSL_SPI_INTERFACE
53#define CONFIG_SF_DATAFLASH
54
55#define CONFIG_FSL_QSPI
56#define QSPI0_AMBA_BASE 0x40000000
57#define CONFIG_SPI_FLASH_SPANSION
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053058
Suresh Gupta5e3f7632017-04-25 14:51:38 +053059#define FSL_QSPI_FLASH_SIZE SZ_64M
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053060#define FSL_QSPI_FLASH_NUM 2
61
62/*
63 * Environment
64 */
65#define CONFIG_ENV_OVERWRITE
66
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053067#define CONFIG_ENV_SIZE 0x40000 /* 256KB */
Bhaskar Upadhaya4def3782017-11-14 05:05:10 +053068#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053069#define CONFIG_ENV_SECT_SIZE 0x40000
70#endif
71
Yuantian Tangae02cf02018-01-03 15:53:10 +080072/* SATA */
73#define CONFIG_SCSI_AHCI_PLAT
74
75#define CONFIG_SYS_SATA AHCI_BASE_ADDR
76
77#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
78#define CONFIG_SYS_SCSI_MAX_LUN 1
79#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
80 CONFIG_SYS_SCSI_MAX_LUN)
81
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053082/* I2C */
83#define CONFIG_SYS_I2C
84#define CONFIG_SYS_I2C_MXC
85#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
86#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
87
88#define CONFIG_CONS_INDEX 1
89#define CONFIG_SYS_NS16550_SERIAL
90#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang904110c2017-01-10 16:44:15 +080091#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053092
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053093#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
94
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053095#define CONFIG_SYS_HZ 1000
96
97#define CONFIG_HWCONFIG
98#define HWCONFIG_BUFFER_SIZE 128
99
Rajesh Bhagata81357a2017-11-30 16:44:38 +0530100#include <config_distro_defaults.h>
101#ifndef CONFIG_SPL_BUILD
102#define BOOT_TARGET_DEVICES(func) \
Yuantian Tangae02cf02018-01-03 15:53:10 +0800103 func(SCSI, scsi, 0) \
Rajesh Bhagata81357a2017-11-30 16:44:38 +0530104 func(MMC, mmc, 0) \
105 func(USB, usb, 0)
106#include <config_distro_bootcmd.h>
107#endif
108
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530109/* Initial environment variables */
110#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530111 "verify=no\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530112 "loadaddr=0x80100000\0" \
113 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530114 "fdt_high=0xffffffffffffffff\0" \
115 "initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya4def3782017-11-14 05:05:10 +0530116 "kernel_start=0x1000000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530117 "kernel_load=0xa0000000\0" \
118 "kernel_size=0x2800000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530119
Rajesh Bhagata81357a2017-11-30 16:44:38 +0530120#undef CONFIG_BOOTCOMMAND
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530121#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
122 "$kernel_start $kernel_size && "\
123 "bootm $kernel_load"
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530124
125/* Monitor Command Prompt */
126#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530127#define CONFIG_SYS_LONGHELP
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530128#define CONFIG_AUTO_COMPLETE
129#define CONFIG_SYS_MAXARGS 64 /* max command args */
130
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530131#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
132
Simon Glass457e51c2017-05-17 08:23:10 -0600133#include <asm/arch/soc.h>
134
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530135#endif /* __LS1012A_COMMON_H */