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Jin Zhengxiong4782ac82006-08-23 19:10:44 +08001/*
Kumar Gala4c2e3da2009-07-28 21:49:52 -05002 * Copyright (C) Freescale Semiconductor, Inc. 2006.
Jin Zhengxiong4782ac82006-08-23 19:10:44 +08003 * Author: Jason Jin<Jason.jin@freescale.com>
4 * Zhang Wei<wei.zhang@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 * with the reference on libata and ahci drvier in kernel
25 *
26 */
27#include <common.h>
28
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080029#include <command.h>
30#include <pci.h>
31#include <asm/processor.h>
32#include <asm/errno.h>
33#include <asm/io.h>
34#include <malloc.h>
35#include <scsi.h>
36#include <ata.h>
37#include <linux/ctype.h>
38#include <ahci.h>
39
40struct ahci_probe_ent *probe_ent = NULL;
41hd_driveid_t *ataid[AHCI_MAX_PORTS];
42
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050043#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
44
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080045
46static inline u32 ahci_port_base(u32 base, u32 port)
47{
48 return base + 0x100 + (port * 0x80);
49}
50
51
52static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
53 unsigned int port_idx)
54{
55 base = ahci_port_base(base, port_idx);
56
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050057 port->cmd_addr = base;
58 port->scr_addr = base + PORT_SCR;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080059}
60
61
62#define msleep(a) udelay(a * 1000)
63#define ssleep(a) msleep(a * 1000)
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050064
65static int waiting_for_cmd_completed(volatile u8 *offset,
66 int timeout_msec,
67 u32 sign)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080068{
69 int i;
70 u32 status;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050071
72 for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080073 msleep(1);
74
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050075 return (i < timeout_msec) ? 0 : -1;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080076}
77
78
79static int ahci_host_init(struct ahci_probe_ent *probe_ent)
80{
81 pci_dev_t pdev = probe_ent->dev;
82 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
83 u32 tmp, cap_save;
84 u16 tmp16;
85 int i, j;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050086 volatile u8 *port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080087 unsigned short vendor;
88
89 cap_save = readl(mmio + HOST_CAP);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050090 cap_save &= ((1 << 28) | (1 << 17));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080091 cap_save |= (1 << 27);
92
93 /* global controller reset */
94 tmp = readl(mmio + HOST_CTL);
95 if ((tmp & HOST_RESET) == 0)
96 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
97
98 /* reset must complete within 1 second, or
99 * the hardware should be considered fried.
100 */
101 ssleep(1);
102
103 tmp = readl(mmio + HOST_CTL);
104 if (tmp & HOST_RESET) {
105 debug("controller reset failed (0x%x)\n", tmp);
106 return -1;
107 }
108
109 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
110 writel(cap_save, mmio + HOST_CAP);
111 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
112
113 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
114
115 if (vendor == PCI_VENDOR_ID_INTEL) {
116 u16 tmp16;
117 pci_read_config_word(pdev, 0x92, &tmp16);
118 tmp16 |= 0xf;
119 pci_write_config_word(pdev, 0x92, tmp16);
120 }
121
122 probe_ent->cap = readl(mmio + HOST_CAP);
123 probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
124 probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
125
126 debug("cap 0x%x port_map 0x%x n_ports %d\n",
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500127 probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800128
129 for (i = 0; i < probe_ent->n_ports; i++) {
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500130 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
131 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
132 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800133
134 /* make sure port is not active */
135 tmp = readl(port_mmio + PORT_CMD);
136 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
137 PORT_CMD_FIS_RX | PORT_CMD_START)) {
138 tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
139 PORT_CMD_FIS_RX | PORT_CMD_START);
140 writel_with_flush(tmp, port_mmio + PORT_CMD);
141
142 /* spec says 500 msecs for each bit, so
143 * this is slightly incorrect.
144 */
145 msleep(500);
146 }
147
148 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
149
150 j = 0;
151 while (j < 100) {
152 msleep(10);
153 tmp = readl(port_mmio + PORT_SCR_STAT);
154 if ((tmp & 0xf) == 0x3)
155 break;
156 j++;
157 }
158
159 tmp = readl(port_mmio + PORT_SCR_ERR);
160 debug("PORT_SCR_ERR 0x%x\n", tmp);
161 writel(tmp, port_mmio + PORT_SCR_ERR);
162
163 /* ack any pending irq events for this port */
164 tmp = readl(port_mmio + PORT_IRQ_STAT);
165 debug("PORT_IRQ_STAT 0x%x\n", tmp);
166 if (tmp)
167 writel(tmp, port_mmio + PORT_IRQ_STAT);
168
169 writel(1 << i, mmio + HOST_IRQ_STAT);
170
171 /* set irq mask (enables interrupts) */
172 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
173
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500174 /*register linkup ports */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800175 tmp = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500176 debug("Port %d status: 0x%x\n", i, tmp);
177 if ((tmp & 0xf) == 0x03)
178 probe_ent->link_port_map |= (0x01 << i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800179 }
180
181 tmp = readl(mmio + HOST_CTL);
182 debug("HOST_CTL 0x%x\n", tmp);
183 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
184 tmp = readl(mmio + HOST_CTL);
185 debug("HOST_CTL 0x%x\n", tmp);
186
187 pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
188 tmp |= PCI_COMMAND_MASTER;
189 pci_write_config_word(pdev, PCI_COMMAND, tmp16);
190
191 return 0;
192}
193
194
195static void ahci_print_info(struct ahci_probe_ent *probe_ent)
196{
197 pci_dev_t pdev = probe_ent->dev;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500198 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800199 u32 vers, cap, impl, speed;
200 const char *speed_s;
201 u16 cc;
202 const char *scc_s;
203
204 vers = readl(mmio + HOST_VERSION);
205 cap = probe_ent->cap;
206 impl = probe_ent->port_map;
207
208 speed = (cap >> 20) & 0xf;
209 if (speed == 1)
210 speed_s = "1.5";
211 else if (speed == 2)
212 speed_s = "3";
213 else
214 speed_s = "?";
215
216 pci_read_config_word(pdev, 0x0a, &cc);
217 if (cc == 0x0101)
218 scc_s = "IDE";
219 else if (cc == 0x0106)
220 scc_s = "SATA";
221 else if (cc == 0x0104)
222 scc_s = "RAID";
223 else
224 scc_s = "unknown";
225
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500226 printf("AHCI %02x%02x.%02x%02x "
227 "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
228 (vers >> 24) & 0xff,
229 (vers >> 16) & 0xff,
230 (vers >> 8) & 0xff,
231 vers & 0xff,
232 ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800233
234 printf("flags: "
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500235 "%s%s%s%s%s%s"
236 "%s%s%s%s%s%s%s\n",
237 cap & (1 << 31) ? "64bit " : "",
238 cap & (1 << 30) ? "ncq " : "",
239 cap & (1 << 28) ? "ilck " : "",
240 cap & (1 << 27) ? "stag " : "",
241 cap & (1 << 26) ? "pm " : "",
242 cap & (1 << 25) ? "led " : "",
243 cap & (1 << 24) ? "clo " : "",
244 cap & (1 << 19) ? "nz " : "",
245 cap & (1 << 18) ? "only " : "",
246 cap & (1 << 17) ? "pmp " : "",
247 cap & (1 << 15) ? "pio " : "",
248 cap & (1 << 14) ? "slum " : "",
249 cap & (1 << 13) ? "part " : "");
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800250}
251
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500252static int ahci_init_one(pci_dev_t pdev)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800253{
Ed Swarthout63cec582007-08-02 14:09:49 -0500254 u16 vendor;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800255 int rc;
256
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500257 memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800258
Ed Swarthout594e7982007-08-14 14:06:45 -0500259 probe_ent = malloc(sizeof(struct ahci_probe_ent));
260 memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800261 probe_ent->dev = pdev;
262
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500263 probe_ent->host_flags = ATA_FLAG_SATA
264 | ATA_FLAG_NO_LEGACY
265 | ATA_FLAG_MMIO
266 | ATA_FLAG_PIO_DMA
267 | ATA_FLAG_NO_ATAPI;
268 probe_ent->pio_mask = 0x1f;
269 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800270
Becky Bruce1785dbe2009-02-03 18:10:55 -0600271 probe_ent->mmio_base = (u32)pci_map_bar(pdev, AHCI_PCI_BAR,
272 PCI_REGION_MEM);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800273
274 /* Take from kernel:
275 * JMicron-specific fixup:
276 * make sure we're in AHCI mode
277 */
278 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500279 if (vendor == 0x197b)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800280 pci_write_config_byte(pdev, 0x41, 0xa1);
281
282 /* initialize adapter */
283 rc = ahci_host_init(probe_ent);
284 if (rc)
285 goto err_out;
286
287 ahci_print_info(probe_ent);
288
289 return 0;
290
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500291 err_out:
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800292 return rc;
293}
294
295
296#define MAX_DATA_BYTE_COUNT (4*1024*1024)
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500297
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800298static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
299{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800300 struct ahci_ioports *pp = &(probe_ent->port[port]);
301 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
302 u32 sg_count;
303 int i;
304
305 sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500306 if (sg_count > AHCI_MAX_SG) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800307 printf("Error:Too much sg!\n");
308 return -1;
309 }
310
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500311 for (i = 0; i < sg_count; i++) {
312 ahci_sg->addr =
313 cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800314 ahci_sg->addr_hi = 0;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500315 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
316 (buf_len < MAX_DATA_BYTE_COUNT
317 ? (buf_len - 1)
318 : (MAX_DATA_BYTE_COUNT - 1)));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800319 ahci_sg++;
320 buf_len -= MAX_DATA_BYTE_COUNT;
321 }
322
323 return sg_count;
324}
325
326
327static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
328{
329 pp->cmd_slot->opts = cpu_to_le32(opts);
330 pp->cmd_slot->status = 0;
331 pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
332 pp->cmd_slot->tbl_addr_hi = 0;
333}
334
335
336static void ahci_set_feature(u8 port)
337{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800338 struct ahci_ioports *pp = &(probe_ent->port[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500339 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
340 u32 cmd_fis_len = 5; /* five dwords */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800341 u8 fis[20];
342
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500343 /*set feature */
344 memset(fis, 0, 20);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800345 fis[0] = 0x27;
346 fis[1] = 1 << 7;
347 fis[2] = ATA_CMD_SETF;
348 fis[3] = SETFEATURES_XFER;
349 fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
350
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500351 memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800352 ahci_fill_cmd_slot(pp, cmd_fis_len);
353 writel(1, port_mmio + PORT_CMD_ISSUE);
354 readl(port_mmio + PORT_CMD_ISSUE);
355
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500356 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800357 printf("set feature error!\n");
358 }
359}
360
361
362static int ahci_port_start(u8 port)
363{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800364 struct ahci_ioports *pp = &(probe_ent->port[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500365 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800366 u32 port_status;
367 u32 mem;
368
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500369 debug("Enter start port: %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800370 port_status = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500371 debug("Port %d status: %x\n", port, port_status);
372 if ((port_status & 0xf) != 0x03) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800373 printf("No Link on this port!\n");
374 return -1;
375 }
376
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500377 mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800378 if (!mem) {
379 free(pp);
380 printf("No mem for table!\n");
381 return -ENOMEM;
382 }
383
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500384 mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
385 memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800386
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800387 /*
388 * First item in chunk of DMA memory: 32-slot command table,
389 * 32 bytes each in size
390 */
391 pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500392 debug("cmd_slot = 0x%x\n", pp->cmd_slot);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800393 mem += (AHCI_CMD_SLOT_SZ + 224);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500394
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800395 /*
396 * Second item: Received-FIS area
397 */
398 pp->rx_fis = mem;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800399 mem += AHCI_RX_FIS_SZ;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500400
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800401 /*
402 * Third item: data area for storing a single command
403 * and its scatter-gather table
404 */
405 pp->cmd_tbl = mem;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500406 debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800407
408 mem += AHCI_CMD_TBL_HDR;
409 pp->cmd_tbl_sg = (struct ahci_sg *)mem;
410
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500411 writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800412
413 writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
414
415 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500416 PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
417 PORT_CMD_START, port_mmio + PORT_CMD);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800418
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500419 debug("Exit start port %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800420
421 return 0;
422}
423
424
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500425static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
426 int buf_len)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800427{
428
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500429 struct ahci_ioports *pp = &(probe_ent->port[port]);
430 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800431 u32 opts;
432 u32 port_status;
433 int sg_count;
434
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500435 debug("Enter get_ahci_device_data: for port %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800436
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500437 if (port > probe_ent->n_ports) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800438 printf("Invaild port number %d\n", port);
439 return -1;
440 }
441
442 port_status = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500443 if ((port_status & 0xf) != 0x03) {
444 debug("No Link on port %d!\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800445 return -1;
446 }
447
448 memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
449
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500450 sg_count = ahci_fill_sg(port, buf, buf_len);
451 opts = (fis_len >> 2) | (sg_count << 16);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800452 ahci_fill_cmd_slot(pp, opts);
453
454 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
455
456 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
457 printf("timeout exit!\n");
458 return -1;
459 }
460 debug("get_ahci_device_data: %d byte transferred.\n",
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500461 pp->cmd_slot->status);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800462
463 return 0;
464}
465
466
467static char *ata_id_strcpy(u16 *target, u16 *src, int len)
468{
469 int i;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500470 for (i = 0; i < len / 2; i++)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800471 target[i] = le16_to_cpu(src[i]);
472 return (char *)target;
473}
474
475
476static void dump_ataid(hd_driveid_t *ataid)
477{
478 debug("(49)ataid->capability = 0x%x\n", ataid->capability);
479 debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
480 debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
481 debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
482 debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
483 debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
484 debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
485 debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
486 debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
487 debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
488 debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
489 debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
490 debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
491 debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
492 debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
493}
494
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500495
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800496/*
497 * SCSI INQUIRY command operation.
498 */
499static int ata_scsiop_inquiry(ccb *pccb)
500{
501 u8 hdr[] = {
502 0,
503 0,
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500504 0x5, /* claim SPC-3 version compatibility */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800505 2,
506 95 - 4,
507 };
508 u8 fis[20];
509 u8 *tmpid;
510 u8 port;
511
512 /* Clean ccb data buffer */
513 memset(pccb->pdata, 0, pccb->datalen);
514
515 memcpy(pccb->pdata, hdr, sizeof(hdr));
516
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500517 if (pccb->datalen <= 35)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800518 return 0;
519
520 memset(fis, 0, 20);
521 /* Construct the FIS */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500522 fis[0] = 0x27; /* Host to device FIS. */
523 fis[1] = 1 << 7; /* Command FIS. */
524 fis[2] = ATA_CMD_IDENT; /* Command byte. */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800525
526 /* Read id from sata */
527 port = pccb->target;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500528 if (!(tmpid = malloc(sizeof(hd_driveid_t))))
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800529 return -ENOMEM;
530
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500531 if (get_ahci_device_data(port, (u8 *) & fis, 20,
532 tmpid, sizeof(hd_driveid_t))) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800533 debug("scsi_ahci: SCSI inquiry command failure.\n");
534 return -EIO;
535 }
536
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500537 if (ataid[port])
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800538 free(ataid[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500539 ataid[port] = (hd_driveid_t *) tmpid;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800540
541 memcpy(&pccb->pdata[8], "ATA ", 8);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500542 ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
543 ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800544
545 dump_ataid(ataid[port]);
546 return 0;
547}
548
549
550/*
551 * SCSI READ10 command operation.
552 */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500553static int ata_scsiop_read10(ccb * pccb)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800554{
555 u64 lba = 0;
556 u32 len = 0;
557 u8 fis[20];
558
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500559 lba = (((u64) pccb->cmd[2]) << 24) | (((u64) pccb->cmd[3]) << 16)
560 | (((u64) pccb->cmd[4]) << 8) | ((u64) pccb->cmd[5]);
561 len = (((u32) pccb->cmd[7]) << 8) | ((u32) pccb->cmd[8]);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800562
563 /* For 10-byte and 16-byte SCSI R/W commands, transfer
564 * length 0 means transfer 0 block of data.
565 * However, for ATA R/W commands, sector count 0 means
566 * 256 or 65536 sectors, not 0 sectors as in SCSI.
567 *
568 * WARNING: one or two older ATA drives treat 0 as 0...
569 */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500570 if (!len)
571 return 0;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800572 memset(fis, 0, 20);
573
574 /* Construct the FIS */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500575 fis[0] = 0x27; /* Host to device FIS. */
576 fis[1] = 1 << 7; /* Command FIS. */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800577 fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
578
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500579 /* LBA address, only support LBA28 in this driver */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800580 fis[4] = pccb->cmd[5];
581 fis[5] = pccb->cmd[4];
582 fis[6] = pccb->cmd[3];
583 fis[7] = (pccb->cmd[2] & 0x0f) | 0xe0;
584
585 /* Sector Count */
586 fis[12] = pccb->cmd[8];
587 fis[13] = pccb->cmd[7];
588
589 /* Read from ahci */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500590 if (get_ahci_device_data(pccb->target, (u8 *) & fis, 20,
591 pccb->pdata, pccb->datalen)) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800592 debug("scsi_ahci: SCSI READ10 command failure.\n");
593 return -EIO;
594 }
595
596 return 0;
597}
598
599
600/*
601 * SCSI READ CAPACITY10 command operation.
602 */
603static int ata_scsiop_read_capacity10(ccb *pccb)
604{
Kumar Galacb6d0b72009-07-13 09:24:00 -0500605 u32 cap;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800606
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500607 if (!ataid[pccb->target]) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800608 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500609 "\tNo ATA info!\n"
610 "\tPlease run SCSI commmand INQUIRY firstly!\n");
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800611 return -EPERM;
612 }
613
Kumar Galacb6d0b72009-07-13 09:24:00 -0500614 cap = le32_to_cpu(ataid[pccb->target]->lba_capacity);
615 memcpy(pccb->pdata, &cap, sizeof(cap));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800616
Kumar Galacb6d0b72009-07-13 09:24:00 -0500617 pccb->pdata[4] = pccb->pdata[5] = 0;
618 pccb->pdata[6] = 512 >> 8;
619 pccb->pdata[7] = 512 & 0xff;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800620
621 return 0;
622}
623
624
625/*
626 * SCSI TEST UNIT READY command operation.
627 */
628static int ata_scsiop_test_unit_ready(ccb *pccb)
629{
630 return (ataid[pccb->target]) ? 0 : -EPERM;
631}
632
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500633
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800634int scsi_exec(ccb *pccb)
635{
636 int ret;
637
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500638 switch (pccb->cmd[0]) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800639 case SCSI_READ10:
640 ret = ata_scsiop_read10(pccb);
641 break;
642 case SCSI_RD_CAPAC:
643 ret = ata_scsiop_read_capacity10(pccb);
644 break;
645 case SCSI_TST_U_RDY:
646 ret = ata_scsiop_test_unit_ready(pccb);
647 break;
648 case SCSI_INQUIRY:
649 ret = ata_scsiop_inquiry(pccb);
650 break;
651 default:
652 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
653 return FALSE;
654 }
655
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500656 if (ret) {
657 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800658 return FALSE;
659 }
660 return TRUE;
661
662}
663
664
665void scsi_low_level_init(int busdevfunc)
666{
667 int i;
668 u32 linkmap;
669
670 ahci_init_one(busdevfunc);
671
672 linkmap = probe_ent->link_port_map;
673
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200674 for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500675 if (((linkmap >> i) & 0x01)) {
676 if (ahci_port_start((u8) i)) {
677 printf("Can not start port %d\n", i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800678 continue;
679 }
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500680 ahci_set_feature((u8) i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800681 }
682 }
683}
684
685
686void scsi_bus_reset(void)
687{
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500688 /*Not implement*/
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800689}
690
691
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500692void scsi_print_error(ccb * pccb)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800693{
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500694 /*The ahci error info can be read in the ahci driver*/
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800695}