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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / db5c91b69a1a36a6e772524e1dd7e011d7ad0066 / . / arch / arm / dts / k3-j7200-r5-common-proc-board.dts
blob: fb7e2e502392135c5e483f9b146d8ce64c5229a5 [file] [log] [blame]
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]3 * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]4 */
5
6/dts-v1/;
7
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]8#include "k3-j7200-common-proc-board.dts"
Kevin Scholzdc9f1002021-06-03 08:14:53 -0500[diff] [blame]9#include "k3-j7200-ddr-evm-lp4-2666.dtsi"
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]10#include "k3-j721e-ddr.dtsi"
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]11#include "k3-j7200-common-proc-board-u-boot.dtsi"
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]12
13/ {
14 aliases {
15 remoteproc0 = &sysctrler;
16 remoteproc1 = &a72_0;
17 };
18
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]19 a72_0: a72@0 {
20 compatible = "ti,am654-rproc";
21 reg = <0x0 0x00a90000 0x0 0x10>;
22 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
Manorit Chawdhrydcdcbde2023-04-14 09:47:55 +0530[diff] [blame]23 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
24 <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]25 resets = <&k3_reset 202 0>;
Nishanth Menon965db9f2021-01-06 13:20:31 -0600[diff] [blame]26 clocks = <&k3_clks 61 1>;
Reid Tonking3d6cb032023-12-07 10:52:11 -0600[diff] [blame]27 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>;
28 assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]29 assigned-clock-rates = <2000000000>, <200000000>;
30 ti,sci = <&dmsc>;
31 ti,sci-proc-id = <32>;
32 ti,sci-host-id = <10>;
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]33 bootph-pre-ram;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]34 };
35
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]36 dm_tifs: dm-tifs {
37 compatible = "ti,j721e-dm-sci";
38 ti,host-id = <3>;
39 ti,secure-host;
40 mbox-names = "rx", "tx";
41 mboxes = <&secure_proxy_mcu 21>,
42 <&secure_proxy_mcu 23>;
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]43 bootph-pre-ram;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]44 };
45};
46
47&memorycontroller {
48 power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
49 <&k3_pds 90 TI_SCI_PD_SHARED>;
50 clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]51 bootph-pre-ram;
52};
53
54&mcu_timer0 {
Aniket Limayeef7d7a22024-03-06 12:07:48 +0530[diff] [blame]55 clock-frequency = <250000000>;
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]56 bootph-pre-ram;
57};
58
59&secure_proxy_mcu {
60 bootph-pre-ram;
61 status = "okay";
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]62};
63
64&cbass_mcu_wakeup {
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]65 sysctrler: sysctrler {
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]66 compatible = "ti,am654-system-controller";
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]67 mboxes= <&secure_proxy_mcu 4>,
68 <&secure_proxy_mcu 5>;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]69 mbox-names = "tx", "rx";
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]70 bootph-pre-ram;
Vignesh Raghavendra00d6fc92021-06-07 19:47:50 +0530[diff] [blame]71 };
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]72};
73
74&dmsc {
Reid Tonkingdf73e792023-10-05 13:12:58 -0500[diff] [blame]75 mboxes = <&secure_proxy_mcu 8>,
76 <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
Dave Gerlach7cc98552020-08-05 22:44:29 +0530[diff] [blame]77 mbox-names = "tx", "rx", "notify";
78 ti,host-id = <4>;
79 ti,secure-host;
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]80 bootph-pre-ram;
Gowtham Tammana6fb87062021-07-14 15:52:57 -0500[diff] [blame]81};
82
Gowtham Tammana2094e702021-07-14 15:52:59 -0500[diff] [blame]83&wkup_vtm0 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]84 bootph-pre-ram;
Gowtham Tammana2094e702021-07-14 15:52:59 -0500[diff] [blame]85};
Aniket Limayee0b0a5e2024-03-06 12:07:47 +0530[diff] [blame]86
87&ospi0 {
88 reg = <0x0 0x47040000 0x0 0x100>,
89 <0x0 0x50000000 0x0 0x8000000>;
90};
Aniket Limayedb5c91b2024-03-06 12:07:49 +0530[diff] [blame^]91
92&mcu_ringacc {
93 ti,sci = <&dm_tifs>;
94};
95
96&mcu_udmap {
97 ti,sci = <&dm_tifs>;
98};