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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / e77b62e2906affb94f442ce7735762883f8147af / . / arch / x86 / dts / chromebook_link.dts
blob: a702ea9d60d1b874539009992034f53aa3608157 [file] [log] [blame]
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]1/dts-v1/;
2
Bin Meng120c4162014-12-24 13:06:39 +0800[diff] [blame]3/include/ "skeleton.dtsi"
Simon Glass6b44ae62015-11-11 10:05:43 -0700[diff] [blame]4/include/ "keyboard.dtsi"
Bin Meng9ca5a0c2014-12-24 13:06:38 +0800[diff] [blame]5/include/ "serial.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +0800[diff] [blame]6/include/ "rtc.dtsi"
Bin Meng80af3982015-11-13 00:11:22 -0800[diff] [blame]7/include/ "tsc_timer.dtsi"
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]8
9/ {
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]10 model = "Google Link";
11 compatible = "google,link", "intel,celeron-ivybridge";
12
Simon Glassa9aff2f2015-01-19 22:16:13 -0700[diff] [blame]13 aliases {
Bin Meng81aaa3d2016-01-27 00:56:34 -0800[diff] [blame]14 spi0 = &spi;
Simon Glass278d3a42016-01-17 16:11:55 -0700[diff] [blame]15 usb0 = &usb_0;
16 usb1 = &usb_1;
Simon Glassa9aff2f2015-01-19 22:16:13 -0700[diff] [blame]17 };
18
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]19 config {
20 silent_console = <0>;
21 };
22
Simon Glassbba22a92016-01-17 16:11:23 -0700[diff] [blame]23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 cpu@0 {
28 device_type = "cpu";
29 compatible = "intel,core-gen3";
30 reg = <0>;
31 intel,apic-id = <0>;
32 };
33
34 cpu@1 {
35 device_type = "cpu";
36 compatible = "intel,core-gen3";
37 reg = <1>;
38 intel,apic-id = <1>;
39 };
40
41 cpu@2 {
42 device_type = "cpu";
43 compatible = "intel,core-gen3";
44 reg = <2>;
45 intel,apic-id = <2>;
46 };
47
48 cpu@3 {
49 device_type = "cpu";
50 compatible = "intel,core-gen3";
51 reg = <3>;
52 intel,apic-id = <3>;
53 };
54
55 };
56
Bin Meng120c4162014-12-24 13:06:39 +0800[diff] [blame]57 chosen {
58 stdout-path = "/serial";
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]59 };
60
Simon Glass6b44ae62015-11-11 10:05:43 -0700[diff] [blame]61 keyboard {
62 intel,duplicate-por;
63 };
64
Simon Glassb021e052014-11-14 18:18:36 -0700[diff] [blame]65 pci {
Simon Glasscdc337e2016-01-17 16:11:41 -0700[diff] [blame]66 compatible = "pci-x86";
Simon Glass801f4f12015-03-05 12:25:32 -0700[diff] [blame]67 #address-cells = <3>;
68 #size-cells = <2>;
69 u-boot,dm-pre-reloc;
70 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
71 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
72 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
Simon Glasse40a6e32016-01-17 16:11:15 -0700[diff] [blame]73
74 northbridge@0,0 {
75 reg = <0x00000000 0 0 0 0>;
76 compatible = "intel,bd82x6x-northbridge";
Simon Glass963a8112016-03-06 19:28:12 -0700[diff] [blame]77 board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
78 <&gpio_b 11 0>, <&gpio_a 10 0>;
Simon Glasse40a6e32016-01-17 16:11:15 -0700[diff] [blame]79 u-boot,dm-pre-reloc;
Simon Glassa86d4542016-03-06 19:28:11 -0700[diff] [blame]80 spd {
81 compatible = "memory-spd";
82 #address-cells = <1>;
83 #size-cells = <0>;
84 elpida_4Gb_1600_x16 {
85 reg = <0>;
86 data = [92 10 0b 03 04 19 02 02
87 03 52 01 08 0a 00 fe 00
88 69 78 69 3c 69 11 18 81
89 20 08 3c 3c 01 40 83 81
90 00 00 00 00 00 00 00 00
91 00 00 00 00 00 00 00 00
92 00 00 00 00 00 00 00 00
93 00 00 00 00 0f 11 42 00
94 00 00 00 00 00 00 00 00
95 00 00 00 00 00 00 00 00
96 00 00 00 00 00 00 00 00
97 00 00 00 00 00 00 00 00
98 00 00 00 00 00 00 00 00
99 00 00 00 00 00 00 00 00
100 00 00 00 00 00 02 fe 00
101 11 52 00 00 00 07 7f 37
102 45 42 4a 32 30 55 47 36
103 45 42 55 30 2d 47 4e 2d
104 46 20 30 20 02 fe 00 00
105 00 00 00 00 00 00 00 00
106 00 00 00 00 00 00 00 00
107 00 00 00 00 00 00 00 00
108 00 00 00 00 00 00 00 00
109 00 00 00 00 00 00 00 00
110 00 00 00 00 00 00 00 00
111 00 00 00 00 00 00 00 00
112 00 00 00 00 00 00 00 00
113 00 00 00 00 00 00 00 00
114 00 00 00 00 00 00 00 00
115 00 00 00 00 00 00 00 00
116 00 00 00 00 00 00 00 00
117 00 00 00 00 00 00 00 00];
118 };
119 samsung_4Gb_1600_1.35v_x16 {
120 reg = <1>;
121 data = [92 11 0b 03 04 19 02 02
122 03 11 01 08 0a 00 fe 00
123 69 78 69 3c 69 11 18 81
124 f0 0a 3c 3c 01 40 83 01
125 00 80 00 00 00 00 00 00
126 00 00 00 00 00 00 00 00
127 00 00 00 00 00 00 00 00
128 00 00 00 00 0f 11 02 00
129 00 00 00 00 00 00 00 00
130 00 00 00 00 00 00 00 00
131 00 00 00 00 00 00 00 00
132 00 00 00 00 00 00 00 00
133 00 00 00 00 00 00 00 00
134 00 00 00 00 00 00 00 00
135 00 00 00 00 00 80 ce 01
136 00 00 00 00 00 00 6a 04
137 4d 34 37 31 42 35 36 37
138 34 42 48 30 2d 59 4b 30
139 20 20 00 00 80 ce 00 00
140 00 00 00 00 00 00 00 00
141 00 00 00 00 00 00 00 00
142 00 00 00 00 00 00 00 00
143 00 00 00 00 00 00 00 00
144 00 00 00 00 00 00 00 00
145 00 00 00 00 00 00 00 00
146 00 00 00 00 00 00 00 00
147 00 00 00 00 00 00 00 00
148 00 00 00 00 00 00 00 00
149 00 00 00 00 00 00 00 00
150 00 00 00 00 00 00 00 00
151 00 00 00 00 00 00 00 00
152 00 00 00 00 00 00 00 00];
153 };
154 micron_4Gb_1600_1.35v_x16 {
155 reg = <2>;
156 data = [92 11 0b 03 04 19 02 02
157 03 11 01 08 0a 00 fe 00
158 69 78 69 3c 69 11 18 81
159 20 08 3c 3c 01 40 83 05
160 00 00 00 00 00 00 00 00
161 00 00 00 00 00 00 00 00
162 00 00 00 00 00 00 00 00
163 00 00 00 00 0f 01 02 00
164 00 00 00 00 00 00 00 00
165 00 00 00 00 00 00 00 00
166 00 00 00 00 00 00 00 00
167 00 00 00 00 00 00 00 00
168 00 00 00 00 00 00 00 00
169 00 00 00 00 00 00 00 00
170 00 00 00 00 00 80 2c 00
171 00 00 00 00 00 00 ad 75
172 34 4b 54 46 32 35 36 36
173 34 48 5a 2d 31 47 36 45
174 31 20 45 31 80 2c 00 00
175 00 00 00 00 00 00 00 00
176 00 00 00 00 00 00 00 00
177 00 00 00 00 00 00 00 00
178 ff ff ff ff ff ff ff ff
179 ff ff ff ff ff ff ff ff
180 ff ff ff ff ff ff ff ff
181 ff ff ff ff ff ff ff ff
182 ff ff ff ff ff ff ff ff
183 ff ff ff ff ff ff ff ff
184 ff ff ff ff ff ff ff ff
185 ff ff ff ff ff ff ff ff
186 ff ff ff ff ff ff ff ff
187 ff ff ff ff ff ff ff ff];
188 };
189 };
Simon Glasse40a6e32016-01-17 16:11:15 -0700[diff] [blame]190 };
191
Simon Glass25d53522016-01-17 16:11:59 -0700[diff] [blame]192 gma@2,0 {
193 reg = <0x00001000 0 0 0 0>;
Simon Glassf3e56fe2014-11-14 20:56:37 -0700[diff] [blame]194 compatible = "intel,gma";
195 intel,dp_hotplug = <0 0 0x06>;
196 intel,panel-port-select = <1>;
197 intel,panel-power-cycle-delay = <6>;
198 intel,panel-power-up-delay = <2000>;
199 intel,panel-power-down-delay = <500>;
200 intel,panel-power-backlight-on-delay = <2000>;
201 intel,panel-power-backlight-off-delay = <2000>;
202 intel,cpu-backlight = <0x00000200>;
203 intel,pch-backlight = <0x04000000>;
204 };
205
Simon Glassc02a4242016-01-17 16:11:50 -0700[diff] [blame]206 me@16,0 {
207 reg = <0x0000b000 0 0 0 0>;
208 compatible = "intel,me";
209 u-boot,dm-pre-reloc;
210 };
211
Simon Glass278d3a42016-01-17 16:11:55 -0700[diff] [blame]212 usb_1: usb@1a,0 {
213 reg = <0x0000d000 0 0 0 0>;
214 compatible = "ehci-pci";
215 };
216
217 usb_0: usb@1d,0 {
218 reg = <0x0000e800 0 0 0 0>;
219 compatible = "ehci-pci";
220 };
221
Simon Glassf2b85ab2016-01-18 20:19:21 -0700[diff] [blame]222 pch@1f,0 {
Simon Glassaad78d22015-03-05 12:25:33 -0700[diff] [blame]223 reg = <0x0000f800 0 0 0 0>;
Simon Glassf2b85ab2016-01-18 20:19:21 -0700[diff] [blame]224 compatible = "intel,bd82x6x", "intel,pch9";
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]225 u-boot,dm-pre-reloc;
Simon Glass6ddc4fd2014-10-10 07:30:13 -0600[diff] [blame]226 #address-cells = <1>;
227 #size-cells = <1>;
Simon Glass05efc392014-11-14 18:18:37 -0700[diff] [blame]228 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
229 0x80 0x80 0x80 0x80>;
230 intel,gpi-routing = <0 0 0 0 0 0 0 2
231 1 0 0 0 0 0 0 0>;
232 /* Enable EC SMI source */
233 intel,alt-gp-smi-enable = <0x0100>;
Simon Glassf2b85ab2016-01-18 20:19:21 -0700[diff] [blame]234
Bin Meng81aaa3d2016-01-27 00:56:34 -0800[diff] [blame]235 spi: spi {
Simon Glassb021e052014-11-14 18:18:36 -0700[diff] [blame]236 #address-cells = <1>;
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]237 #size-cells = <0>;
Bin Meng1f9eb592016-02-01 01:40:37 -0800[diff] [blame]238 compatible = "intel,ich9-spi";
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]239 spi-flash@0 {
240 #size-cells = <1>;
241 #address-cells = <1>;
242 reg = <0>;
243 compatible = "winbond,w25q64",
244 "spi-flash";
245 memory-map = <0xff800000 0x00800000>;
246 rw-mrc-cache {
247 label = "rw-mrc-cache";
248 reg = <0x003e0000 0x00010000>;
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]249 };
250 };
251 };
252
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]253 gpio_a: gpioa {
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]254 compatible = "intel,ich6-gpio";
255 u-boot,dm-pre-reloc;
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]256 #gpio-cells = <2>;
257 gpio-controller;
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]258 reg = <0 0x10>;
259 bank-name = "A";
260 };
261
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]262 gpio_b: gpiob {
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]263 compatible = "intel,ich6-gpio";
264 u-boot,dm-pre-reloc;
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]265 #gpio-cells = <2>;
266 gpio-controller;
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]267 reg = <0x30 0x10>;
268 bank-name = "B";
269 };
270
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]271 gpio_c: gpioc {
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]272 compatible = "intel,ich6-gpio";
273 u-boot,dm-pre-reloc;
Simon Glasse9822d42016-03-06 19:28:10 -0700[diff] [blame]274 #gpio-cells = <2>;
275 gpio-controller;
Bin Meng3ddc1c72016-02-01 01:40:47 -0800[diff] [blame]276 reg = <0x40 0x10>;
277 bank-name = "C";
278 };
279
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]280 lpc {
281 compatible = "intel,bd82x6x-lpc";
282 #address-cells = <1>;
283 #size-cells = <0>;
Simon Glass4acc83d2016-01-17 16:11:10 -0700[diff] [blame]284 u-boot,dm-pre-reloc;
Simon Glass788cd902016-01-17 16:11:11 -0700[diff] [blame]285 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
Simon Glass90b16d12015-03-26 09:29:29 -0600[diff] [blame]286 cros-ec@200 {
287 compatible = "google,cros-ec";
288 reg = <0x204 1 0x200 1 0x880 0x80>;
289
290 /*
291 * Describes the flash memory within
292 * the EC
293 */
294 #address-cells = <1>;
295 #size-cells = <1>;
296 flash@8000000 {
297 reg = <0x08000000 0x20000>;
298 erase-value = <0xff>;
299 };
Simon Glassb021e052014-11-14 18:18:36 -0700[diff] [blame]300 };
Simon Glass6ddc4fd2014-10-10 07:30:13 -0600[diff] [blame]301 };
302 };
Simon Glassd46f2a62016-01-17 16:11:35 -0700[diff] [blame]303
304 sata@1f,2 {
305 compatible = "intel,pantherpoint-ahci";
306 reg = <0x0000fa00 0 0 0 0>;
307 u-boot,dm-pre-reloc;
308 intel,sata-mode = "ahci";
309 intel,sata-port-map = <1>;
310 intel,sata-port0-gen3-tx = <0x00880a7f>;
311 };
Simon Glass0c7645b2016-01-17 16:11:45 -0700[diff] [blame]312
313 smbus: smbus@1f,3 {
314 compatible = "intel,ich-i2c";
315 reg = <0x0000fb00 0 0 0 0>;
316 u-boot,dm-pre-reloc;
317 };
Simon Glass6ddc4fd2014-10-10 07:30:13 -0600[diff] [blame]318 };
Simon Glass9c678e12014-11-12 22:42:22 -0700[diff] [blame]319
Simon Glass6e474ea2015-08-22 18:31:37 -0600[diff] [blame]320 tpm {
321 reg = <0xfed40000 0x5000>;
322 compatible = "infineon,slb9635lpc";
323 };
324
Simon Glass9c678e12014-11-12 22:42:22 -0700[diff] [blame]325 microcode {
326 update@0 {
Simon Glasscf29e3e2014-12-15 22:02:40 -0700[diff] [blame]327#include "microcode/m12306a9_0000001b.dtsi"
Simon Glass9c678e12014-11-12 22:42:22 -0700[diff] [blame]328 };
329 };
330
Simon Glass2712f082012-12-03 13:56:51 +0000[diff] [blame]331};