Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame] | 1 | /*++ @file
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| 2 | Emu driver to produce CPU Architectural Protocol.
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| 3 |
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| 4 | Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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| 5 | Portions copyright (c) 2011 - 2012, Apple Inc. All rights reserved.
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| 6 | This program and the accompanying materials
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| 7 | are licensed and made available under the terms and conditions of the BSD License
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| 8 | which accompanies this distribution. The full text of the license may be found at
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| 9 | http://opensource.org/licenses/bsd-license.php
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| 10 |
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| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 13 |
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| 14 | **/
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| 15 |
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| 16 | #include "CpuDriver.h"
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| 17 |
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| 18 | UINT64 mTimerPeriod;
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| 19 |
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| 20 | CPU_ARCH_PROTOCOL_PRIVATE mCpuTemplate = {
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| 21 | CPU_ARCH_PROT_PRIVATE_SIGNATURE,
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| 22 | NULL,
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| 23 | {
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| 24 | EmuFlushCpuDataCache,
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| 25 | EmuEnableInterrupt,
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| 26 | EmuDisableInterrupt,
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| 27 | EmuGetInterruptState,
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| 28 | EmuInit,
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| 29 | EmuRegisterInterruptHandler,
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| 30 | EmuGetTimerValue,
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| 31 | EmuSetMemoryAttributes,
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| 32 | 0,
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| 33 | 4
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| 34 | },
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| 35 | {
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| 36 | {
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| 37 | CpuMemoryServiceRead,
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| 38 | CpuMemoryServiceWrite
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| 39 | },
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| 40 | {
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| 41 | CpuIoServiceRead,
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| 42 | CpuIoServiceWrite
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| 43 | }
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| 44 | },
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| 45 | TRUE
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| 46 | };
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| 47 |
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| 48 | #define EFI_CPU_DATA_MAXIMUM_LENGTH 0x100
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| 49 |
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| 50 | SMBIOS_TABLE_TYPE4 mCpuSmbiosType4 = {
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| 51 | { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0},
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| 52 | 1, // Socket String
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| 53 | ProcessorOther, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
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| 54 | ProcessorFamilyOther, // ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
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| 55 | 2, // ProcessorManufacture String;
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| 56 | { // ProcessorId;
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| 57 | { // PROCESSOR_SIGNATURE
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| 58 | 0, // ProcessorSteppingId:4;
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| 59 | 0, // ProcessorModel: 4;
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| 60 | 0, // ProcessorFamily: 4;
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| 61 | 0, // ProcessorType: 2;
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| 62 | 0, // ProcessorReserved1: 2;
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| 63 | 0, // ProcessorXModel: 4;
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| 64 | 0, // ProcessorXFamily: 8;
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| 65 | 0, // ProcessorReserved2: 4;
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| 66 | },
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| 67 | { // PROCESSOR_FEATURE_FLAGS
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| 68 | 0, // ProcessorFpu :1;
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| 69 | 0, // ProcessorVme :1;
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| 70 | 0, // ProcessorDe :1;
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| 71 | 0, // ProcessorPse :1;
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| 72 | 0, // ProcessorTsc :1;
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| 73 | 0, // ProcessorMsr :1;
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| 74 | 0, // ProcessorPae :1;
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| 75 | 0, // ProcessorMce :1;
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| 76 | 0, // ProcessorCx8 :1;
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| 77 | 0, // ProcessorApic :1;
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| 78 | 0, // ProcessorReserved1 :1;
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| 79 | 0, // ProcessorSep :1;
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| 80 | 0, // ProcessorMtrr :1;
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| 81 | 0, // ProcessorPge :1;
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| 82 | 0, // ProcessorMca :1;
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| 83 | 0, // ProcessorCmov :1;
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| 84 | 0, // ProcessorPat :1;
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| 85 | 0, // ProcessorPse36 :1;
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| 86 | 0, // ProcessorPsn :1;
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| 87 | 0, // ProcessorClfsh :1;
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| 88 | 0, // ProcessorReserved2 :1;
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| 89 | 0, // ProcessorDs :1;
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| 90 | 0, // ProcessorAcpi :1;
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| 91 | 0, // ProcessorMmx :1;
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| 92 | 0, // ProcessorFxsr :1;
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| 93 | 0, // ProcessorSse :1;
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| 94 | 0, // ProcessorSse2 :1;
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| 95 | 0, // ProcessorSs :1;
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| 96 | 0, // ProcessorReserved3 :1;
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| 97 | 0, // ProcessorTm :1;
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| 98 | 0, // ProcessorReserved4 :2;
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| 99 | }
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| 100 | },
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| 101 | 3, // ProcessorVersion String;
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| 102 | { // Voltage;
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| 103 | 1, // ProcessorVoltageCapability5V :1;
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| 104 | 1, // ProcessorVoltageCapability3_3V :1;
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| 105 | 1, // ProcessorVoltageCapability2_9V :1;
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| 106 | 0, // ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
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| 107 | 0, // ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
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| 108 | 0 // ProcessorVoltageIndicateLegacy :1;
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| 109 | },
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| 110 | 0, // ExternalClock;
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| 111 | 0, // MaxSpeed;
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| 112 | 0, // CurrentSpeed;
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| 113 | 0x41, // Status;
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| 114 | ProcessorUpgradeOther, // ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
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| 115 | 0, // L1CacheHandle;
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| 116 | 0, // L2CacheHandle;
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| 117 | 0, // L3CacheHandle;
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| 118 | 4, // SerialNumber;
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| 119 | 5, // AssetTag;
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| 120 | 6, // PartNumber;
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| 121 | 0, // CoreCount;
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| 122 | 0, // EnabledCoreCount;
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| 123 | 0, // ThreadCount;
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| 124 | 0, // ProcessorCharacteristics;
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| 125 | 0, // ProcessorFamily2;
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| 126 | };
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| 127 |
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| 128 | CHAR8 *mCpuSmbiosType4Strings[] = {
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| 129 | "Socket",
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| 130 | "http://www.tianocore.org/edk2/",
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| 131 | "Emulated Processor",
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| 132 | "1.0",
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| 133 | "1.0",
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| 134 | "1.0",
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| 135 | NULL
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| 136 | };
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| 137 |
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| 138 |
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| 139 | /**
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| 140 | Create SMBIOS record.
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| 141 |
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| 142 | Converts a fixed SMBIOS structure and an array of pointers to strings into
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| 143 | an SMBIOS record where the strings are cat'ed on the end of the fixed record
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| 144 | and terminated via a double NULL and add to SMBIOS table.
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| 145 |
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| 146 | SMBIOS_TABLE_TYPE32 gSmbiosType12 = {
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| 147 | { EFI_SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS, sizeof (SMBIOS_TABLE_TYPE12), 0 },
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| 148 | 1 // StringCount
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| 149 | };
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| 150 | CHAR8 *gSmbiosType12Strings[] = {
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| 151 | "Not Found",
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| 152 | NULL
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| 153 | };
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| 154 |
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| 155 | ...
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| 156 | LogSmbiosData (
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| 157 | (EFI_SMBIOS_TABLE_HEADER*)&gSmbiosType12,
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| 158 | gSmbiosType12Strings
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| 159 | );
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| 160 |
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| 161 | @param Template Fixed SMBIOS structure, required.
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| 162 | @param StringArray Array of strings to convert to an SMBIOS string pack.
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| 163 | NULL is OK.
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| 164 |
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| 165 | **/
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| 166 | EFI_STATUS
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| 167 | LogSmbiosData (
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| 168 | IN EFI_SMBIOS_TABLE_HEADER *Template,
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| 169 | IN CHAR8 **StringPack
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| 170 | )
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| 171 | {
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| 172 | EFI_STATUS Status;
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| 173 | EFI_SMBIOS_PROTOCOL *Smbios;
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| 174 | EFI_SMBIOS_HANDLE SmbiosHandle;
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| 175 | EFI_SMBIOS_TABLE_HEADER *Record;
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| 176 | UINTN Index;
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| 177 | UINTN StringSize;
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| 178 | UINTN Size;
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| 179 | CHAR8 *Str;
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| 180 |
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| 181 | //
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| 182 | // Locate Smbios protocol.
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| 183 | //
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| 184 | Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID **)&Smbios);
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| 185 | if (EFI_ERROR (Status)) {
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| 186 | return Status;
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| 187 | }
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| 188 |
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| 189 | // Calculate the size of the fixed record and optional string pack
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| 190 | Size = Template->Length;
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| 191 | if (StringPack == NULL) {
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| 192 | // At least a double null is required
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| 193 | Size += 2;
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| 194 | } else {
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| 195 | for (Index = 0; StringPack[Index] != NULL; Index++) {
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| 196 | StringSize = AsciiStrSize (StringPack[Index]);
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| 197 | Size += StringSize;
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| 198 | }
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| 199 | if (StringPack[0] == NULL) {
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| 200 | // At least a double null is required
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| 201 | Size += 1;
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| 202 | }
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| 203 | // Don't forget the terminating double null
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| 204 | Size += 1;
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| 205 | }
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| 206 |
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| 207 | // Copy over Template
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| 208 | Record = (EFI_SMBIOS_TABLE_HEADER *)AllocateZeroPool (Size);
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| 209 | if (Record == NULL) {
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| 210 | return EFI_OUT_OF_RESOURCES;
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| 211 | }
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| 212 | CopyMem (Record, Template, Template->Length);
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| 213 |
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| 214 | // Append string pack
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| 215 | Str = ((CHAR8 *)Record) + Record->Length;
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| 216 | for (Index = 0; StringPack[Index] != NULL; Index++) {
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| 217 | StringSize = AsciiStrSize (StringPack[Index]);
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| 218 | CopyMem (Str, StringPack[Index], StringSize);
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| 219 | Str += StringSize;
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| 220 | }
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| 221 | *Str = 0;
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| 222 |
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| 223 | SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
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| 224 | Status = Smbios->Add (
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| 225 | Smbios,
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| 226 | gImageHandle,
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| 227 | &SmbiosHandle,
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| 228 | Record
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| 229 | );
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| 230 | ASSERT_EFI_ERROR (Status);
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| 231 |
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| 232 | FreePool (Record);
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| 233 | return Status;
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| 234 | }
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| 235 |
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| 236 |
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| 237 |
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| 238 |
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| 239 | VOID
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| 240 | CpuUpdateSmbios (
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| 241 | IN UINTN MaxCpus
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| 242 | )
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| 243 | {
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| 244 | mCpuSmbiosType4.CoreCount = (UINT8) MaxCpus;
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| 245 | mCpuSmbiosType4.EnabledCoreCount = (UINT8) MaxCpus;
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| 246 | mCpuSmbiosType4.ThreadCount = (UINT8) MaxCpus;
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| 247 |
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| 248 | LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mCpuSmbiosType4, mCpuSmbiosType4Strings);
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| 249 | }
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| 250 |
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| 251 |
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| 252 | //
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| 253 | // Service routines for the driver
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| 254 | //
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| 255 | EFI_STATUS
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| 256 | EFIAPI
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| 257 | EmuFlushCpuDataCache (
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| 258 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 259 | IN EFI_PHYSICAL_ADDRESS Start,
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| 260 | IN UINT64 Length,
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| 261 | IN EFI_CPU_FLUSH_TYPE FlushType
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| 262 | )
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| 263 | {
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| 264 | if (FlushType == EfiCpuFlushTypeWriteBackInvalidate) {
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| 265 | //
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| 266 | // Only WB flush is supported. We actually need do nothing on Emu emulator
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| 267 | // environment. Classify this to follow EFI spec
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| 268 | //
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| 269 | return EFI_SUCCESS;
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| 270 | }
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| 271 | //
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| 272 | // Other flush types are not supported by Emu emulator
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| 273 | //
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| 274 | return EFI_UNSUPPORTED;
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| 275 | }
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| 276 |
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| 277 | EFI_STATUS
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| 278 | EFIAPI
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| 279 | EmuEnableInterrupt (
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| 280 | IN EFI_CPU_ARCH_PROTOCOL *This
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| 281 | )
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| 282 | {
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| 283 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 284 |
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| 285 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 286 | Private->InterruptState = TRUE;
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| 287 | gEmuThunk->EnableInterrupt ();
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| 288 | return EFI_SUCCESS;
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| 289 | }
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| 290 |
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| 291 | EFI_STATUS
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| 292 | EFIAPI
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| 293 | EmuDisableInterrupt (
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| 294 | IN EFI_CPU_ARCH_PROTOCOL *This
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| 295 | )
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| 296 | {
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| 297 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 298 |
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| 299 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 300 | Private->InterruptState = FALSE;
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| 301 | gEmuThunk->DisableInterrupt ();
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| 302 | return EFI_SUCCESS;
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| 303 | }
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| 304 |
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| 305 | EFI_STATUS
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| 306 | EFIAPI
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| 307 | EmuGetInterruptState (
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| 308 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 309 | OUT BOOLEAN *State
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| 310 | )
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| 311 | {
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| 312 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 313 |
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| 314 | if (State == NULL) {
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| 315 | return EFI_INVALID_PARAMETER;
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| 316 | }
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| 317 |
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| 318 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 319 | *State = Private->InterruptState;
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| 320 | return EFI_SUCCESS;
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| 321 | }
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| 322 |
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| 323 | EFI_STATUS
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| 324 | EFIAPI
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| 325 | EmuInit (
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| 326 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 327 | IN EFI_CPU_INIT_TYPE InitType
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| 328 | )
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| 329 | {
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| 330 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 331 |
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| 332 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 333 | return EFI_UNSUPPORTED;
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| 334 | }
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| 335 |
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| 336 | EFI_STATUS
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| 337 | EFIAPI
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| 338 | EmuRegisterInterruptHandler (
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| 339 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 340 | IN EFI_EXCEPTION_TYPE InterruptType,
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| 341 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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| 342 | )
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| 343 | {
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| 344 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 345 |
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| 346 | //
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| 347 | // Do parameter checking for EFI spec conformance
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| 348 | //
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| 349 | if (InterruptType < 0 || InterruptType > 0xff) {
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| 350 | return EFI_UNSUPPORTED;
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| 351 | }
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| 352 | //
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| 353 | // Do nothing for Emu emulation
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| 354 | //
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| 355 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 356 | return EFI_UNSUPPORTED;
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| 357 | }
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| 358 |
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| 359 | EFI_STATUS
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| 360 | EFIAPI
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| 361 | EmuGetTimerValue (
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| 362 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 363 | IN UINT32 TimerIndex,
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| 364 | OUT UINT64 *TimerValue,
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| 365 | OUT UINT64 *TimerPeriod OPTIONAL
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| 366 | )
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| 367 | {
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| 368 | if (TimerValue == NULL) {
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| 369 | return EFI_INVALID_PARAMETER;
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| 370 | }
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| 371 |
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| 372 | if (TimerIndex != 0) {
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| 373 | return EFI_INVALID_PARAMETER;
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| 374 | }
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| 375 |
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| 376 | *TimerValue = gEmuThunk->QueryPerformanceCounter ();
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| 377 |
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| 378 | if (TimerPeriod != NULL) {
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| 379 | *TimerPeriod = mTimerPeriod;
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| 380 | }
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| 381 |
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| 382 | return EFI_SUCCESS;
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| 383 | }
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| 384 |
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| 385 |
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| 386 | EFI_STATUS
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| 387 | EFIAPI
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| 388 | EmuSetMemoryAttributes (
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| 389 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 390 | IN EFI_PHYSICAL_ADDRESS BaseAddress,
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| 391 | IN UINT64 Length,
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| 392 | IN UINT64 Attributes
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| 393 | )
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| 394 | {
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| 395 | CPU_ARCH_PROTOCOL_PRIVATE *Private;
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| 396 |
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| 397 | //
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| 398 | // Check for invalid parameter for Spec conformance
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| 399 | //
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| 400 | if (Length == 0) {
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| 401 | return EFI_INVALID_PARAMETER;
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| 402 | }
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| 403 |
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| 404 | //
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| 405 | // Do nothing for Nt32 emulation
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| 406 | //
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| 407 | Private = CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS (This);
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| 408 | return EFI_UNSUPPORTED;
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| 409 | }
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| 410 |
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| 411 |
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| 412 |
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| 413 |
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| 414 | /**
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| 415 | Callback function for idle events.
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| 416 |
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| 417 | @param Event Event whose notification function is being invoked.
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| 418 | @param Context The pointer to the notification function's context,
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| 419 | which is implementation-dependent.
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| 420 |
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| 421 | **/
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| 422 | VOID
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| 423 | EFIAPI
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| 424 | IdleLoopEventCallback (
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| 425 | IN EFI_EVENT Event,
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| 426 | IN VOID *Context
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| 427 | )
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| 428 | {
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| 429 | gEmuThunk->CpuSleep ();
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| 430 | }
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| 431 |
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| 432 |
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| 433 | EFI_STATUS
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| 434 | EFIAPI
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| 435 | InitializeCpu (
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| 436 | IN EFI_HANDLE ImageHandle,
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| 437 | IN EFI_SYSTEM_TABLE *SystemTable
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| 438 | )
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| 439 | {
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| 440 | EFI_STATUS Status;
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| 441 | UINT64 Frequency;
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| 442 | EFI_EVENT IdleLoopEvent;
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| 443 | UINTN MaxCpu;
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| 444 |
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| 445 | //
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| 446 | // Retrieve the frequency of the performance counter in Hz.
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| 447 | //
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| 448 | Frequency = gEmuThunk->QueryPerformanceFrequency ();
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| 449 |
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| 450 | //
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| 451 | // Convert frequency in Hz to a clock period in femtoseconds.
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| 452 | //
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| 453 | mTimerPeriod = DivU64x64Remainder (1000000000000000ULL, Frequency, NULL);
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| 454 |
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| 455 | CpuMpServicesInit (&MaxCpu);
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| 456 |
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| 457 | CpuUpdateSmbios (MaxCpu);
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| 458 |
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| 459 |
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| 460 | Status = gBS->CreateEventEx (
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| 461 | EVT_NOTIFY_SIGNAL,
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| 462 | TPL_NOTIFY,
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| 463 | IdleLoopEventCallback,
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| 464 | NULL,
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| 465 | &gIdleLoopEventGuid,
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| 466 | &IdleLoopEvent
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| 467 | );
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| 468 | ASSERT_EFI_ERROR (Status);
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| 469 |
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| 470 |
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| 471 | Status = gBS->InstallMultipleProtocolInterfaces (
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| 472 | &mCpuTemplate.Handle,
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| 473 | &gEfiCpuArchProtocolGuid, &mCpuTemplate.Cpu,
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| 474 | &gEfiCpuIo2ProtocolGuid, &mCpuTemplate.CpuIo,
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| 475 | NULL
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| 476 | );
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| 477 | ASSERT_EFI_ERROR (Status);
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| 478 |
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| 479 | return Status;
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| 480 | }
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