Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame] | 1 | /** @file
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| 2 | EFI SMM Control PPI definition.
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| 3 |
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| 4 | This PPI is used to initiate SMI/PMI activations. This protocol could be published by either:
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| 5 | - A processor driver to abstract the SMI/PMI IPI
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| 6 | - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
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| 7 | Intel chipset
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| 8 | Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
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| 9 | event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based
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| 10 | systems.
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| 11 |
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| 12 | Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
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| 13 |
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| 14 | This program and the accompanying materials
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| 15 | are licensed and made available under the terms and conditions
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| 16 | of the BSD License which accompanies this distribution. The
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| 17 | full text of the license may be found at
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| 18 | http://opensource.org/licenses/bsd-license.php
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| 19 |
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| 20 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 21 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 22 |
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| 23 | **/
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| 24 |
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| 25 |
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| 26 | #ifndef _SMM_CONTROL_PPI_H_
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| 27 | #define _SMM_CONTROL_PPI_H_
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| 28 |
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| 29 | #define PEI_SMM_CONTROL_PPI_GUID \
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| 30 | { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }
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| 31 |
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| 32 | typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI;
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| 33 |
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| 34 | /**
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| 35 | Invokes SMI activation from either the preboot or runtime environment.
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| 36 |
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| 37 | @param PeiServices General purpose services available to every PEIM.
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| 38 | @param This The PEI_SMM_CONTROL_PPI instance.
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| 39 | @param ArgumentBuffer The optional sized data to pass into the protocol activation.
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| 40 | @param ArgumentBufferSize The optional size of the data.
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| 41 | @param Periodic An optional mechanism to periodically repeat activation.
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| 42 | @param ActivationInterval An optional parameter to repeat at this period one
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| 43 | time or, if the Periodic Boolean is set, periodically.
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| 44 |
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| 45 | @retval EFI_SUCCESS The SMI/PMI has been engendered.
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| 46 | @retval EFI_DEVICE_ERROR The timing is unsupported.
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| 47 | @retval EFI_INVALID_PARAMETER The activation period is unsupported.
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| 48 | @retval EFI_NOT_STARTED The SMM base service has not been initialized.
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| 49 |
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| 50 | **/
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| 51 | typedef
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| 52 | EFI_STATUS
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| 53 | (EFIAPI *PEI_SMM_ACTIVATE) (
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| 54 | IN EFI_PEI_SERVICES **PeiServices,
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| 55 | IN PEI_SMM_CONTROL_PPI * This,
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| 56 | IN OUT INT8 *ArgumentBuffer OPTIONAL,
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| 57 | IN OUT UINTN *ArgumentBufferSize OPTIONAL,
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| 58 | IN BOOLEAN Periodic OPTIONAL,
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| 59 | IN UINTN ActivationInterval OPTIONAL
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| 60 | );
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| 61 |
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| 62 | /**
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| 63 | Clears any system state that was created in response to the Active call.
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| 64 |
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| 65 | @param PeiServices General purpose services available to every PEIM.
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| 66 | @param This The PEI_SMM_CONTROL_PPI instance.
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| 67 | @param Periodic Optional parameter to repeat at this period one
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| 68 | time or, if the Periodic Boolean is set, periodically.
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| 69 |
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| 70 | @retval EFI_SUCCESS The SMI/PMI has been engendered.
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| 71 | @retval EFI_DEVICE_ERROR The source could not be cleared.
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| 72 | @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
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| 73 |
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| 74 | **/
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| 75 | typedef
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| 76 | EFI_STATUS
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| 77 | (EFIAPI *PEI_SMM_DEACTIVATE) (
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| 78 | IN EFI_PEI_SERVICES **PeiServices,
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| 79 | IN PEI_SMM_CONTROL_PPI * This,
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| 80 | IN BOOLEAN Periodic OPTIONAL
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| 81 | );
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| 82 |
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| 83 | ///
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| 84 | /// PEI SMM Control PPI is used to initiate SMI/PMI activations. This protocol could be published by either:
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| 85 | /// - A processor driver to abstract the SMI/PMI IPI
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| 86 | /// - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
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| 87 | /// Intel chipset
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| 88 | ///
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| 89 | struct _PEI_SMM_CONTROL_PPI {
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| 90 | PEI_SMM_ACTIVATE Trigger;
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| 91 | PEI_SMM_DEACTIVATE Clear;
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| 92 | };
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| 93 |
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| 94 | extern EFI_GUID gPeiSmmControlPpiGuid;
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| 95 |
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| 96 | #endif
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