Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame] | 1 | /** @file
|
| 2 | C based implemention of IA32 interrupt handling only
|
| 3 | requiring a minimal assembly interrupt entry point.
|
| 4 |
|
| 5 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
|
| 6 | This program and the accompanying materials
|
| 7 | are licensed and made available under the terms and conditions of the BSD License
|
| 8 | which accompanies this distribution. The full text of the license may be found at
|
| 9 | http://opensource.org/licenses/bsd-license.php
|
| 10 |
|
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
| 13 |
|
| 14 | **/
|
| 15 |
|
| 16 | #ifndef _CPU_GDT_H_
|
| 17 | #define _CPU_GDT_H_
|
| 18 |
|
| 19 | //
|
| 20 | // Local structure definitions
|
| 21 | //
|
| 22 |
|
| 23 | #pragma pack (1)
|
| 24 |
|
| 25 | //
|
| 26 | // Global Descriptor Entry structures
|
| 27 | //
|
| 28 |
|
| 29 | typedef struct _GDT_ENTRY {
|
| 30 | UINT16 Limit15_0;
|
| 31 | UINT16 Base15_0;
|
| 32 | UINT8 Base23_16;
|
| 33 | UINT8 Type;
|
| 34 | UINT8 Limit19_16_and_flags;
|
| 35 | UINT8 Base31_24;
|
| 36 | } GDT_ENTRY;
|
| 37 |
|
| 38 | typedef
|
| 39 | struct _GDT_ENTRIES {
|
| 40 | GDT_ENTRY Null;
|
| 41 | GDT_ENTRY Linear;
|
| 42 | GDT_ENTRY LinearCode;
|
| 43 | GDT_ENTRY SysData;
|
| 44 | GDT_ENTRY SysCode;
|
| 45 | GDT_ENTRY LinearCode64;
|
| 46 | GDT_ENTRY Spare4;
|
| 47 | GDT_ENTRY Spare5;
|
| 48 | } GDT_ENTRIES;
|
| 49 |
|
| 50 | #pragma pack ()
|
| 51 |
|
| 52 | #define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
|
| 53 | #define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
|
| 54 | #define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
|
| 55 | #define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
|
| 56 | #define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
|
| 57 | #define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
|
| 58 | #define SPARE4_SEL OFFSET_OF (GDT_ENTRIES, Spare4)
|
| 59 | #define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
|
| 60 |
|
| 61 | #if defined (MDE_CPU_IA32)
|
| 62 | #define CPU_CODE_SEL LINEAR_CODE_SEL
|
| 63 | #define CPU_DATA_SEL LINEAR_SEL
|
| 64 | #elif defined (MDE_CPU_X64)
|
| 65 | #define CPU_CODE_SEL LINEAR_CODE64_SEL
|
| 66 | #define CPU_DATA_SEL LINEAR_SEL
|
| 67 | #else
|
| 68 | #error CPU type not supported for CPU GDT initialization!
|
| 69 | #endif
|
| 70 |
|
| 71 | #endif // _CPU_GDT_H_
|
| 72 |
|