blob: b2cd60240ba37fd17046d27d592185065fb6f56c [file] [log] [blame]
Vishal Bhoj82c80712015-12-15 21:13:33 +05301/*
2 * Copyright (c) 2015, Linaro Ltd and Contributors. All rights reserved.
3 * Copyright (c) 2015, Hisilicon Ltd and Contributors. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * Neither the name of ARM nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific
17 * prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <debug.h>
33#include <stdint.h>
34#include <strings.h>
35#include <platform_def.h>
36
37#define PORTNUM_MAX 5
38
39#define MDDRC_SECURITY_BASE 0xF7121000
40
41struct int_en_reg {
42 unsigned in_en:1;
43 unsigned reserved:31;
44};
45
46struct rgn_map_reg {
47 unsigned rgn_base_addr:24;
48 unsigned rgn_size:6;
49 unsigned reserved:1;
50 unsigned rgn_en:1;
51};
52
53struct rgn_attr_reg {
54 unsigned sp:4;
55 unsigned security_inv:1;
56 unsigned reserved_0:3;
57 unsigned mid_en:1;
58 unsigned mid_inv:1;
59 unsigned reserved_1:6;
60 unsigned rgn_en:1;
61 unsigned subrgn_disable:16;
62};
63
64static volatile struct int_en_reg *get_int_en_reg(uint32_t base)
65{
66 uint64_t addr = base + 0x20;
67 return (struct int_en_reg *)addr;
68}
69
70static volatile struct rgn_map_reg *get_rgn_map_reg(uint32_t base, int region, int port)
71{
72 uint64_t addr = base + 0x100 + 0x10 * region + 0x400 * port;
73 return (struct rgn_map_reg *)addr;
74}
75
76static volatile struct rgn_attr_reg *get_rgn_attr_reg(uint32_t base, int region,
77 int port)
78{
79 uint64_t addr = base + 0x104 + 0x10 * region + 0x400 * port;
80 return (struct rgn_attr_reg *)addr;
81}
82
83static int is_power_of_two(uint32_t x)
84{
85 return ((x != 0) && !(x & (x - 1)));
86}
87
88/*
89 * Configure secure memory region
90 * region_size must be a power of 2 and at least 64KB
91 * region_base must be region_size aligned
92 */
93static void sec_protect(uint32_t region_base, uint32_t region_size)
94{
95 volatile struct int_en_reg *int_en_reg ;
96 volatile struct rgn_map_reg *rgn_map_reg;
97 volatile struct rgn_attr_reg *rgn_attr_reg;
98 uint32_t i = 0;
99
100 if (!is_power_of_two(region_size) || region_size < 0x10000) {
101 ERROR("Secure region size is not a power of 2 >= 64KB\n");
102 return;
103 }
104 if (region_base & (region_size - 1)) {
105 ERROR("Secure region address is not aligned to region size\n");
106 return;
107 }
108
109 INFO("BL2: TrustZone: protecting %u bytes of memory at 0x%x\n", region_size,
110 region_base);
111
112 int_en_reg = get_int_en_reg(MDDRC_SECURITY_BASE);
113 int_en_reg->in_en = 0x1;
114
115 for (i = 0; i < PORTNUM_MAX; i++) {
116 rgn_map_reg = get_rgn_map_reg(MDDRC_SECURITY_BASE, 1, i);
117 rgn_attr_reg = get_rgn_attr_reg(MDDRC_SECURITY_BASE, 1, i);
118 rgn_map_reg->rgn_base_addr = region_base >> 16;
119 rgn_attr_reg->subrgn_disable = 0x0;
120 rgn_attr_reg->sp = (i == 3) ? 0xC : 0x0;
121 rgn_map_reg->rgn_size = __builtin_ffs(region_size) - 2;
122 rgn_map_reg->rgn_en = 0x1;
123 }
124}
125
126/*******************************************************************************
127 * Initialize the secure environment.
128 ******************************************************************************/
129void plat_security_setup(void)
130{
131 sec_protect(DRAM_SEC_BASE, DRAM_SEC_SIZE);
132}