| Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /** @file
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| 2 |
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| 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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| 4 |
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| 5 | This program and the accompanying materials
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| 6 | are licensed and made available under the terms and conditions of the BSD License
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| 7 | which accompanies this distribution. The full text of the license may be found at
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| 8 | http://opensource.org/licenses/bsd-license.php
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| 9 |
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| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 12 |
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| 13 | **/
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| 14 |
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| 15 | #include <Library/IoLib.h>
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| 16 | #include <Library/DebugLib.h>
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| 17 |
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| 18 | #include <Omap3530/Omap3530.h>
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| 19 |
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| 20 | VOID
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| 21 | ClockInit (
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| 22 | VOID
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| 23 | )
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| 24 | {
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| 25 | //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
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| 26 |
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| 27 | // Enable PLL5 and set to 120 MHz as a reference clock.
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| 28 | MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
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| 29 | MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
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| 30 | MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
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| 31 |
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| 32 | // Turn on functional & interface clocks to the USBHOST power domain
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| 33 | MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
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| 34 | | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
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| 35 | MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
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| 36 |
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| 37 | // Turn on functional & interface clocks to the USBTLL block.
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| 38 | MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
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| 39 | MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
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| 40 |
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| 41 | // Turn on functional & interface clocks to MMC1 and I2C1 modules.
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| 42 | MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
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| 43 | | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
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| 44 | MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
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| 45 | | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
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| 46 |
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| 47 | // Turn on functional & interface clocks to various Peripherals.
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| 48 | MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
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| 49 | | CM_FCLKEN_PER_EN_GPT4_ENABLE
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| 50 | | CM_FCLKEN_PER_EN_GPIO2_ENABLE
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| 51 | | CM_FCLKEN_PER_EN_GPIO3_ENABLE
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| 52 | | CM_FCLKEN_PER_EN_GPIO4_ENABLE
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| 53 | | CM_FCLKEN_PER_EN_GPIO5_ENABLE
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| 54 | | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
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| 55 | MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
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| 56 | | CM_ICLKEN_PER_EN_GPT3_ENABLE
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| 57 | | CM_ICLKEN_PER_EN_GPT4_ENABLE
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| 58 | | CM_ICLKEN_PER_EN_GPIO2_ENABLE
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| 59 | | CM_ICLKEN_PER_EN_GPIO3_ENABLE
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| 60 | | CM_ICLKEN_PER_EN_GPIO4_ENABLE
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| 61 | | CM_ICLKEN_PER_EN_GPIO5_ENABLE
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| 62 | | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
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| 63 |
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| 64 | // Turn on functional & inteface clocks to various wakeup modules.
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| 65 | MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
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| 66 | | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
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| 67 | MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
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| 68 | | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
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| 69 | }
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