Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /** @file
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| 2 |
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| 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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| 4 |
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| 5 | This program and the accompanying materials
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| 6 | are licensed and made available under the terms and conditions of the BSD License
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| 7 | which accompanies this distribution. The full text of the license may be found at
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| 8 | http://opensource.org/licenses/bsd-license.php
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| 9 |
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| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 12 |
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| 13 | **/
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| 14 |
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| 15 | #include <PiPei.h>
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| 16 | #include <Library/IoLib.h>
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| 17 | #include <Library/DebugLib.h>
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| 18 | #include <Omap3530/Omap3530.h>
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| 19 | #include <BeagleBoard.h>
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| 20 |
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| 21 | #define NUM_PINS_SHARED 232
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| 22 | #define NUM_PINS_ABC 6
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| 23 | #define NUM_PINS_XM 12
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| 24 |
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| 25 | PAD_CONFIGURATION PadConfigurationTableShared[] = {
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| 26 | //Pin, MuxMode, PullConfig, InputEnable
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| 27 | { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
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| 28 | { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
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| 29 | { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
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| 30 | { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
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| 31 | { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
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| 32 | { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
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| 33 | { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
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| 34 | { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
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| 35 | { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
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| 36 | { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
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| 37 | { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
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| 38 | { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
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| 39 | { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
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| 40 | { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
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| 41 | { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
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| 42 | { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
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| 43 | { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
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| 44 | { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
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| 45 | { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
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| 46 | { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
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| 47 | { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
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| 48 | { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
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| 49 | { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
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| 50 | { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
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| 51 | { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
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| 52 | { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
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| 53 | { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
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| 54 | { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
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| 55 | { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
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| 56 | { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
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| 57 | { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
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| 58 | { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
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| 59 | { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
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| 60 | { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
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| 61 | { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 62 | { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
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| 63 | { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
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| 64 | { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
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| 65 | { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
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| 66 | { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 67 | { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 68 | { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 69 | { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 70 | { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 71 | { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 72 | { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 73 | { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 74 | { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 75 | { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 76 | { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
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| 77 | { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
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| 78 | { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
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| 79 | { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
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| 80 | { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
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| 81 | { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
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| 82 | { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
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| 83 | { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
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| 84 | { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
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| 85 | { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
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| 86 | { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
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| 87 | { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
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| 88 | { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
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| 89 | { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
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| 90 | { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
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| 91 | { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
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| 92 | { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
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| 93 | { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 94 | { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 95 | { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 96 | { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 97 | { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 98 | { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
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| 99 | { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
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| 100 | { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 101 | { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
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| 102 | { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
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| 103 | { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
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| 104 | { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 105 | { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
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| 106 | { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
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| 107 | { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 108 | { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 109 | { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 110 | { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 111 | { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 112 | { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 113 | { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 114 | { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 115 | { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 116 | { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 117 | { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 118 | { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 119 | { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 120 | { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 121 | { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 122 | { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 123 | { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 124 | { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 125 | { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 126 | { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 127 | { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 128 | { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 129 | { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 130 | { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 131 | { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 132 | { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 133 | { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 134 | { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 135 | { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 136 | { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 137 | { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 138 | { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
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| 139 | { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
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| 140 | { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
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| 141 | { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
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| 142 | { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
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| 143 | { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
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| 144 | { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
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| 145 | { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
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| 146 | { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
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| 147 | { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
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| 148 | { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
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| 149 | { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
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| 150 | { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 151 | { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
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| 152 | { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 153 | { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
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| 154 | { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
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| 155 | { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
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| 156 | { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
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| 157 | { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
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| 158 | { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
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| 159 | { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
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| 160 | { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 161 | { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 162 | { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 163 | { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 164 | { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 165 | { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 166 | { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 167 | { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 168 | { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 169 | { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 170 | { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 171 | { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 172 | { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 173 | { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 174 | { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 175 | { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 176 | { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 177 | { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 178 | { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 179 | { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 180 | { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 181 | { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 182 | { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 183 | { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 184 | { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 185 | { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 186 | { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 187 | { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 188 | { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 189 | { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 190 | { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 191 | { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 192 | { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
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| 193 | { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
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| 194 | { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
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| 195 | { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
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| 196 | { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
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| 197 | { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 198 | { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
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| 199 | { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 200 | { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 201 | { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 202 | { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 203 | { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 204 | { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 205 | { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 206 | { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
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| 207 | { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 208 | { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
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| 209 | { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 210 | { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
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| 211 | { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
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| 212 | { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
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| 213 | { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
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| 214 | { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
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| 215 | { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
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| 216 | { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
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| 217 | { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
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| 218 | { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
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| 219 | { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
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| 220 | { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 221 | { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 222 | { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 223 | { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 224 | { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 225 | { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 226 | { HDQ_SIO, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 227 | { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 228 | { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 229 | { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
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| 230 | { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 231 | { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
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| 232 | { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
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| 233 | { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 234 | { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 235 | { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 236 | { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 237 | { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 238 | { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 239 | { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
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| 240 | { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 241 | { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
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| 242 | { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
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| 243 | { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 244 | { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 245 | { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 246 | { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 247 | { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 248 | { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 249 | { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 250 | { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 251 | { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 252 | { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
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| 253 | { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
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| 254 | { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
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| 255 | { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 256 | { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 257 | { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
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| 258 | { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
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| 259 | };
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| 260 |
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| 261 | PAD_CONFIGURATION PadConfigurationTableAbc[] = {
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| 262 | { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 263 | { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 264 | { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 265 | { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 266 | { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
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| 267 | { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT }
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| 268 | };
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| 269 |
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| 270 | PAD_CONFIGURATION PadConfigurationTableXm[] = {
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| 271 | { DSS_DATA18, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 272 | { DSS_DATA19, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 273 | { DSS_DATA20, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 274 | { DSS_DATA21, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 275 | { DSS_DATA22, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 276 | { DSS_DATA23, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 277 | { SYS_BOOT0, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 278 | { SYS_BOOT1, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 279 | { SYS_BOOT3, MUXMODE3, PULL_DISABLED, OUTPUT },
|
| 280 | { SYS_BOOT4, MUXMODE3, PULL_DISABLED, OUTPUT },
|
| 281 | { SYS_BOOT5, MUXMODE3, PULL_DISABLED, OUTPUT },
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| 282 | { SYS_BOOT6, MUXMODE3, PULL_DISABLED, OUTPUT }
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| 283 | };
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| 284 |
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| 285 | VOID
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| 286 | PadConfiguration (
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| 287 | BEAGLEBOARD_REVISION Revision
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| 288 | )
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| 289 | {
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| 290 | UINTN Index;
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| 291 | UINT16 PadConfiguration;
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| 292 | PAD_CONFIGURATION *BoardConfiguration;
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| 293 | UINTN NumPinsToConfigure;
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| 294 |
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| 295 | for (Index = 0; Index < NUM_PINS_SHARED; Index++) {
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| 296 | // Set up Pad configuration for particular pin.
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| 297 | PadConfiguration = (PadConfigurationTableShared[Index].MuxMode << MUXMODE_OFFSET);
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| 298 | PadConfiguration |= (PadConfigurationTableShared[Index].PullConfig << PULL_CONFIG_OFFSET);
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| 299 | PadConfiguration |= (PadConfigurationTableShared[Index].InputEnable << INPUTENABLE_OFFSET);
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| 300 |
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| 301 | // Configure the pin with specific Pad configuration.
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| 302 | MmioWrite16(PadConfigurationTableShared[Index].Pin, PadConfiguration);
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| 303 | }
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| 304 |
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| 305 | if (Revision == REVISION_XM) {
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| 306 | BoardConfiguration = PadConfigurationTableXm;
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| 307 | NumPinsToConfigure = NUM_PINS_XM;
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| 308 | } else {
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| 309 | BoardConfiguration = PadConfigurationTableAbc;
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| 310 | NumPinsToConfigure = NUM_PINS_ABC;
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| 311 | }
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| 312 |
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| 313 | for (Index = 0; Index < NumPinsToConfigure; Index++) {
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| 314 | //Set up Pad configuration for particular pin.
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| 315 | PadConfiguration = (BoardConfiguration[Index].MuxMode << MUXMODE_OFFSET);
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| 316 | PadConfiguration |= (BoardConfiguration[Index].PullConfig << PULL_CONFIG_OFFSET);
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| 317 | PadConfiguration |= (BoardConfiguration[Index].InputEnable << INPUTENABLE_OFFSET);
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| 318 |
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| 319 | //Configure the pin with specific Pad configuration.
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| 320 | MmioWrite16(BoardConfiguration[Index].Pin, PadConfiguration);
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| 321 | }
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| 322 | }
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