Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /** @file
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| 2 | This PPI manipulates the I2C host controller to perform transactions as a master
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| 3 | on the I2C bus using the current state of any switches or multiplexers in the I2C bus.
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| 4 |
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| 5 | Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
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| 6 | This program and the accompanying materials
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| 7 | are licensed and made available under the terms and conditions of the BSD License
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| 8 | which accompanies this distribution. The full text of the license may be found at
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| 9 | http://opensource.org/licenses/bsd-license.php
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| 10 |
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| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 13 |
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| 14 | @par Revision Reference:
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| 15 | This PPI is introduced in PI Version 1.3.
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| 16 |
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| 17 | **/
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| 18 |
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| 19 | #ifndef __I2C_MASTER_PPI_H__
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| 20 | #define __I2C_MASTER_PPI_H__
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| 21 |
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| 22 | #include <Pi/PiI2c.h>
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| 23 |
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| 24 | #define EFI_PEI_I2C_MASTER_PPI_GUID \
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| 25 | { 0xb3bfab9b, 0x9f9c, 0x4e8b, { 0xad, 0x37, 0x7f, 0x8c, 0x51, 0xfc, 0x62, 0x80 }}
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| 26 |
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| 27 | typedef struct _EFI_PEI_I2C_MASTER_PPI EFI_PEI_I2C_MASTER_PPI;
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| 28 |
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| 29 | /**
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| 30 | Set the frequency for the I2C clock line.
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| 31 |
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| 32 | @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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| 33 | @param BusClockHertz Pointer to the requested I2C bus clock frequency in Hertz.
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| 34 | Upon return this value contains the actual frequency
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| 35 | in use by the I2C controller.
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| 36 |
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| 37 | @retval EFI_SUCCESS The bus frequency was set successfully.
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| 38 | @retval EFI_INVALID_PARAMETER BusClockHertz is NULL
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| 39 | @retval EFI_UNSUPPORTED The controller does not support this frequency.
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| 40 |
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| 41 | **/
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| 42 | typedef
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| 43 | EFI_STATUS
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| 44 | (EFIAPI *EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY) (
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| 45 | IN EFI_PEI_I2C_MASTER_PPI *This,
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| 46 | IN UINTN *BusClockHertz
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| 47 | );
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| 48 |
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| 49 | /**
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| 50 | Reset the I2C controller and configure it for use.
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| 51 |
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| 52 | @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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| 53 |
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| 54 | @retval EFI_SUCCESS The reset completed successfully.
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| 55 | @retval EFI_DEVICE_ERROR The reset operation failed.
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| 56 |
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| 57 | **/
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| 58 | typedef
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| 59 | EFI_STATUS
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| 60 | (EFIAPI *EFI_PEI_I2C_MASTER_PPI_RESET) (
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| 61 | IN CONST EFI_PEI_I2C_MASTER_PPI *This
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| 62 | );
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| 63 |
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| 64 | /**
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| 65 | Start an I2C transaction on the host controller.
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| 66 |
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| 67 | @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
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| 68 | @param SlaveAddress Address of the device on the I2C bus.
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| 69 | Set the I2C_ADDRESSING_10_BIT when using 10-bit addresses,
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| 70 | clear this bit for 7-bit addressing.
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| 71 | Bits 0-6 are used for 7-bit I2C slave addresses and
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| 72 | bits 0-9 are used for 10-bit I2C slave addresses.
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| 73 | @param RequestPacket Pointer to an EFI_I2C_REQUEST_PACKET structure describing the I2C transaction.
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| 74 |
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| 75 | @retval EFI_SUCCESS The transaction completed successfully.
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| 76 | @retval EFI_BAD_BUFFER_SIZE The RequestPacket->LengthInBytes value is too large.
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| 77 | @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the transaction.
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| 78 | @retval EFI_INVALID_PARAMETER RequestPacket is NULL
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| 79 | @retval EFI_NO_RESPONSE The I2C device is not responding to the slave address.
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| 80 | EFI_DEVICE_ERROR will be returned if the controller cannot distinguish when the NACK occurred.
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| 81 | @retval EFI_NOT_FOUND Reserved bit set in the SlaveAddress parameter
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| 82 | @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C transaction
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| 83 | @retval EFI_UNSUPPORTED The controller does not support the requested transaction.
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| 84 |
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| 85 | **/
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| 86 | typedef
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| 87 | EFI_STATUS
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| 88 | (EFIAPI *EFI_PEI_I2C_MASTER_PPI_START_REQUEST) (
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| 89 | IN CONST EFI_PEI_I2C_MASTER_PPI *This,
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| 90 | IN UINTN SlaveAddress,
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| 91 | IN EFI_I2C_REQUEST_PACKET *RequestPacket
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| 92 | );
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| 93 |
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| 94 | ///
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| 95 | /// This PPI manipulates the I2C host controller to perform transactions as a master on the I2C bus
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| 96 | /// using the current state of any switches or multiplexers in the I2C bus.
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| 97 | ///
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| 98 | struct _EFI_PEI_I2C_MASTER_PPI {
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| 99 | EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY SetBusFrequency;
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| 100 | EFI_PEI_I2C_MASTER_PPI_RESET Reset;
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| 101 | EFI_PEI_I2C_MASTER_PPI_START_REQUEST StartRequest;
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| 102 | CONST EFI_I2C_CONTROLLER_CAPABILITIES *I2cControllerCapabilities;
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| 103 | EFI_GUID Identifier;
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| 104 | };
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| 105 |
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| 106 | extern EFI_GUID gEfiPeiI2cMasterPpiGuid;
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| 107 |
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| 108 | #endif
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