| Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /** @file
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| 2 | OVMF Platform definitions
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| 3 |
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| 4 | Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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| 5 |
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| 6 | This program and the accompanying materials are licensed and made
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| 7 | available under the terms and conditions of the BSD License which
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| 8 | accompanies this distribution. The full text of the license may
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| 9 | be found at http://opensource.org/licenses/bsd-license.php
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| 10 |
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| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 13 | **/
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| 14 |
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| 15 | #ifndef __OVMF_PLATFORMS_H__
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| 16 | #define __OVMF_PLATFORMS_H__
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| 17 |
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| 18 | #include <Library/PciLib.h>
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| 19 | #include <IndustryStandard/Pci22.h>
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| 20 |
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| 21 | //
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| 22 | // Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH
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| 23 | //
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| 24 | #define INTEL_82441_DEVICE_ID 0x1237 // PIIX4
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| 25 | #define INTEL_Q35_MCH_DEVICE_ID 0x29C0 // Q35
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| 26 |
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| 27 | //
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| 28 | // OVMF Host Bridge DID Address
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| 29 | //
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| 30 | #define OVMF_HOSTBRIDGE_DID \
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| 31 | PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
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| 32 |
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| 33 | //
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| 34 | // Power Management Device and Function numbers for PIIX4 and Q35/MCH
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| 35 | //
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| 36 | #define OVMF_PM_DEVICE_PIIX4 0x01
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| 37 | #define OVMF_PM_FUNC_PIIX4 0x03
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| 38 | #define OVMF_PM_DEVICE_Q35 0x1f
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| 39 | #define OVMF_PM_FUNC_Q35 0x00
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| 40 |
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| 41 | //
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| 42 | // Power Management Register access for PIIX4 and Q35/MCH
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| 43 | //
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| 44 | #define POWER_MGMT_REGISTER_PIIX4(Offset) \
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| 45 | PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))
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| 46 | #define POWER_MGMT_REGISTER_Q35(Offset) \
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| 47 | PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))
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| 48 |
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| 49 | #endif
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