Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /** @file
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| 2 | Internal include file for the CPU I/O 2 Protocol.
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| 3 |
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| 4 | Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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| 5 | This program and the accompanying materials
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| 6 | are licensed and made available under the terms and conditions of the BSD License
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| 7 | which accompanies this distribution. The full text of the license may be found at
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| 8 | http://opensource.org/licenses/bsd-license.php
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| 9 |
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| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 12 |
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| 13 | **/
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| 14 |
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| 15 | #ifndef _CPU_IO2_DXE_H_
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| 16 | #define _CPU_IO2_DXE_H_
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| 17 |
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| 18 | #include <PiDxe.h>
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| 19 |
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| 20 | #include <Protocol/CpuIo2.h>
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| 21 |
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| 22 | #include <Library/BaseLib.h>
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| 23 | #include <Library/DebugLib.h>
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| 24 | #include <Library/IoLib.h>
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| 25 | #include <Library/UefiBootServicesTableLib.h>
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| 26 |
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| 27 | #define MAX_IO_PORT_ADDRESS 0xFFFF
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| 28 |
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| 29 | /**
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| 30 | Reads memory-mapped registers.
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| 31 |
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| 32 | The I/O operations are carried out exactly as requested. The caller is responsible
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| 33 | for satisfying any alignment and I/O width restrictions that a PI System on a
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| 34 | platform might require. For example on some platforms, width requests of
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| 35 | EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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| 36 | be handled by the driver.
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| 37 |
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| 38 | If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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| 39 | or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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| 40 | each of the Count operations that is performed.
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| 41 |
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| 42 | If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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| 43 | EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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| 44 | incremented for each of the Count operations that is performed. The read or
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| 45 | write operation is performed Count times on the same Address.
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| 46 |
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| 47 | If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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| 48 | EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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| 49 | incremented for each of the Count operations that is performed. The read or
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| 50 | write operation is performed Count times from the first element of Buffer.
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| 51 |
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| 52 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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| 53 | @param[in] Width Signifies the width of the I/O or Memory operation.
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| 54 | @param[in] Address The base address of the I/O operation.
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| 55 | @param[in] Count The number of I/O operations to perform. The number of
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| 56 | bytes moved is Width size * Count, starting at Address.
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| 57 | @param[out] Buffer For read operations, the destination buffer to store the results.
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| 58 | For write operations, the source buffer from which to write data.
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| 59 |
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| 60 | @retval EFI_SUCCESS The data was read from or written to the PI system.
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| 61 | @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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| 62 | @retval EFI_INVALID_PARAMETER Buffer is NULL.
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| 63 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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| 64 | @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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| 65 | and Count is not valid for this PI system.
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| 66 |
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| 67 | **/
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| 68 | EFI_STATUS
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| 69 | EFIAPI
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| 70 | CpuMemoryServiceRead (
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| 71 | IN EFI_CPU_IO2_PROTOCOL *This,
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| 72 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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| 73 | IN UINT64 Address,
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| 74 | IN UINTN Count,
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| 75 | OUT VOID *Buffer
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| 76 | );
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| 77 |
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| 78 | /**
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| 79 | Writes memory-mapped registers.
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| 80 |
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| 81 | The I/O operations are carried out exactly as requested. The caller is responsible
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| 82 | for satisfying any alignment and I/O width restrictions that a PI System on a
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| 83 | platform might require. For example on some platforms, width requests of
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| 84 | EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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| 85 | be handled by the driver.
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| 86 |
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| 87 | If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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| 88 | or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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| 89 | each of the Count operations that is performed.
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| 90 |
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| 91 | If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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| 92 | EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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| 93 | incremented for each of the Count operations that is performed. The read or
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| 94 | write operation is performed Count times on the same Address.
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| 95 |
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| 96 | If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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| 97 | EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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| 98 | incremented for each of the Count operations that is performed. The read or
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| 99 | write operation is performed Count times from the first element of Buffer.
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| 100 |
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| 101 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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| 102 | @param[in] Width Signifies the width of the I/O or Memory operation.
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| 103 | @param[in] Address The base address of the I/O operation.
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| 104 | @param[in] Count The number of I/O operations to perform. The number of
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| 105 | bytes moved is Width size * Count, starting at Address.
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| 106 | @param[in] Buffer For read operations, the destination buffer to store the results.
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| 107 | For write operations, the source buffer from which to write data.
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| 108 |
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| 109 | @retval EFI_SUCCESS The data was read from or written to the PI system.
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| 110 | @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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| 111 | @retval EFI_INVALID_PARAMETER Buffer is NULL.
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| 112 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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| 113 | @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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| 114 | and Count is not valid for this PI system.
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| 115 |
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| 116 | **/
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| 117 | EFI_STATUS
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| 118 | EFIAPI
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| 119 | CpuMemoryServiceWrite (
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| 120 | IN EFI_CPU_IO2_PROTOCOL *This,
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| 121 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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| 122 | IN UINT64 Address,
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| 123 | IN UINTN Count,
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| 124 | IN VOID *Buffer
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| 125 | );
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| 126 |
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| 127 | /**
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| 128 | Reads I/O registers.
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| 129 |
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| 130 | The I/O operations are carried out exactly as requested. The caller is responsible
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| 131 | for satisfying any alignment and I/O width restrictions that a PI System on a
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| 132 | platform might require. For example on some platforms, width requests of
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| 133 | EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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| 134 | be handled by the driver.
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| 135 |
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| 136 | If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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| 137 | or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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| 138 | each of the Count operations that is performed.
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| 139 |
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| 140 | If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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| 141 | EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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| 142 | incremented for each of the Count operations that is performed. The read or
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| 143 | write operation is performed Count times on the same Address.
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| 144 |
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| 145 | If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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| 146 | EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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| 147 | incremented for each of the Count operations that is performed. The read or
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| 148 | write operation is performed Count times from the first element of Buffer.
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| 149 |
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| 150 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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| 151 | @param[in] Width Signifies the width of the I/O or Memory operation.
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| 152 | @param[in] Address The base address of the I/O operation.
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| 153 | @param[in] Count The number of I/O operations to perform. The number of
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| 154 | bytes moved is Width size * Count, starting at Address.
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| 155 | @param[out] Buffer For read operations, the destination buffer to store the results.
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| 156 | For write operations, the source buffer from which to write data.
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| 157 |
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| 158 | @retval EFI_SUCCESS The data was read from or written to the PI system.
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| 159 | @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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| 160 | @retval EFI_INVALID_PARAMETER Buffer is NULL.
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| 161 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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| 162 | @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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| 163 | and Count is not valid for this PI system.
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| 164 |
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| 165 | **/
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| 166 | EFI_STATUS
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| 167 | EFIAPI
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| 168 | CpuIoServiceRead (
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| 169 | IN EFI_CPU_IO2_PROTOCOL *This,
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| 170 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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| 171 | IN UINT64 Address,
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| 172 | IN UINTN Count,
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| 173 | OUT VOID *Buffer
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| 174 | );
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| 175 |
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| 176 | /**
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| 177 | Write I/O registers.
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| 178 |
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| 179 | The I/O operations are carried out exactly as requested. The caller is responsible
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| 180 | for satisfying any alignment and I/O width restrictions that a PI System on a
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| 181 | platform might require. For example on some platforms, width requests of
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| 182 | EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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| 183 | be handled by the driver.
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| 184 |
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| 185 | If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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| 186 | or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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| 187 | each of the Count operations that is performed.
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| 188 |
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| 189 | If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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| 190 | EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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| 191 | incremented for each of the Count operations that is performed. The read or
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| 192 | write operation is performed Count times on the same Address.
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| 193 |
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| 194 | If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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| 195 | EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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| 196 | incremented for each of the Count operations that is performed. The read or
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| 197 | write operation is performed Count times from the first element of Buffer.
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| 198 |
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| 199 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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| 200 | @param[in] Width Signifies the width of the I/O or Memory operation.
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| 201 | @param[in] Address The base address of the I/O operation.
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| 202 | @param[in] Count The number of I/O operations to perform. The number of
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| 203 | bytes moved is Width size * Count, starting at Address.
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| 204 | @param[in] Buffer For read operations, the destination buffer to store the results.
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| 205 | For write operations, the source buffer from which to write data.
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| 206 |
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| 207 | @retval EFI_SUCCESS The data was read from or written to the PI system.
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| 208 | @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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| 209 | @retval EFI_INVALID_PARAMETER Buffer is NULL.
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| 210 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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| 211 | @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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| 212 | and Count is not valid for this PI system.
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| 213 |
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| 214 | **/
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| 215 | EFI_STATUS
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| 216 | EFIAPI
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| 217 | CpuIoServiceWrite (
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| 218 | IN EFI_CPU_IO2_PROTOCOL *This,
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| 219 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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| 220 | IN UINT64 Address,
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| 221 | IN UINTN Count,
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| 222 | IN VOID *Buffer
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| 223 | );
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| 224 |
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| 225 | #endif
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