blob: 696a5411d511c6114911d65eec261960ce3638f5 [file] [log] [blame]
Vishal Bhoj82c80712015-12-15 21:13:33 +05301/**************************************************************************;
2;* *;
3;* *;
4;* Intel Corporation - ACPI Reference Code for the Haswell *;
5;* Family of Customer Reference Boards. *;
6;* *;
7;* *;
8;* Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved *;
9;
10; This program and the accompanying materials are licensed and made available under
11; the terms and conditions of the BSD License that accompanies this distribution.
12; The full text of the license may be found at
13; http://opensource.org/licenses/bsd-license.php.
14;
15; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17;
18;* *;
19;* *;
20;**************************************************************************/
21
22//scope is \_SB.PCI0.XHC
23Device(XHC1)
24{
25 Name(_ADR, 0x00140000) //Device 20, Function 0
26
27 //When it is in Host mode, USH core is connected to USB3 microAB(USB3 P1 and USB2 P0)
28 Name (_DDN, "Baytrail XHCI controller (CCG core/Host only)" )
29
30 Method(XDEP, 0)
31 {
32 If(LEqual(OSYS,2013))
33 {
34 Name(_DEP, Package(0x1)
35 {
36 PEPD
37 })
38 }
39 }
40
41 Name (_STR, Unicode ("Baytrail XHCI controller (CCG core/Host only)"))
42 Name(_PRW, Package() {0xD,4})
43
44 Method(_PSW,1)
45 {
46 If (LAnd (PMES, PMEE)) {
47 Store (0, PMEE)
48 Store (1, PMES)
49 }
50 }
51
52 OperationRegion (PMEB, PCI_Config, 0x74, 0x04) // Power Management Control/Status
53 Field (PMEB, WordAcc, NoLock, Preserve)
54 {
55 , 8,
56 PMEE, 1, //bit8 PME_En
57 , 6,
58 PMES, 1 //bit15 PME_Status
59 }
60
61 Method(_STA, 0)
62 {
63 If(LNotEqual(XHCI, 0)) //NVS variable controls present of XHCI controller
64 {
65 Return (0xF)
66 } Else
67 {
68 Return (0x0)
69 }
70 }
71
72 OperationRegion(XPRT,PCI_Config,0xD0,0x10)
73 Field(XPRT,DWordAcc,NoLock,Preserve) //usbx_top.doc.xml
74 {
75 PR2, 32, //bit[8:0] USB2HCSEL
76 PR2M, 32, //bit[8:0] USB2HCSELM
77 PR3, 32, //bit[3:0] USB3SSEN
78 PR3M, 32 //bit[3:0] USB3SSENM
79 }
80
81 Device(RHUB)
82 {
83 Name(_ADR, Zero) //address 0 is reserved for root hub
84
85 //
86 // Super Speed Ports - must match _UPC declarations of the coresponding Full Speed Ports.
87 // Paired with Port 1
88 Device(SSP1)
89 {
90 Name(_ADR, 0x07)
91
92 Method(_UPC,0,Serialized)
93 {
94 Name(UPCP, Package()
95 {
96 0xFF, // Port is connectable if non-zero
97 0x06, // USB3 uAB connector
98 0x00,
99 0x00
100 })
101 Return(UPCP)
102 }
103
104 Method(_PLD,0,Serialized)
105 {
106 Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8
107 {
108 Buffer(0x14)
109 {
110 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
111 0x82, 0x00, 0x00, 0x00,
112 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
113 0x00, 0x00, 0x00, 0x00,
114 //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center
115 // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
116 0x4B, 0x19, 0x00, 0x00,
117 //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number
118 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
119 0x03, 0x00, 0x00, 0x00,
120 //159:128 Vert. and Horiz. Offsets not supplied
121 0xFF, 0xFF, 0xFF, 0xFF
122 }
123 })
124 Return (PLDP)
125 }
126 }
127 //
128 // High Speed Ports
129 // pair port with port 7 (SS)
130 // The UPC declarations for LS/FS/HS and SS ports that are paired to form a USB3.0 compatible connector.
131 // A "pair" is defined by two ports that declare _PLDs with identical Panel, Vertical Position, Horizontal Postion, Shape, Group Orientation
132 // and Group Token
133 Device(HS01)
134 {
135 Name(_ADR, 0x01)
136
137 Method(_UPC,0,Serialized)
138 {
139 Name(UPCP, Package() { 0xFF,0x06,0x00,0x00 })
140 Return(UPCP)
141 }
142
143 Method(_PLD,0,Serialized)
144 {
145 Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8
146 {
147 Buffer(0x14)
148 {
149 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
150 0x82, 0x00, 0x00, 0x00,
151 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
152 0x00, 0x00, 0x00, 0x00,
153 //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center
154 // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
155 0x4B, 0x19, 0x00, 0x00,
156 //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number
157 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
158 0x03, 0x00, 0x00, 0x00,
159 //159:128 Vert. and Horiz. Offsets not supplied
160 0xFF, 0xFF, 0xFF, 0xFF
161 }
162 })
163 Return (PLDP)
164 }
165 }//end of HS01
166
167 // USB2 Type-A/USB2 only
168 // EHCI debug capable
169 Device(HS02)
170 {
171 Name(_ADR, 0x02) // 0 is for root hub so physical port index starts from 1 (it is port1 in schematic)
172
173 Method(_UPC,0,Serialized)
174 {
175 Name(UPCP, Package()
176 {
177 0xFF, // connectable
178 0xFF, //
179 0x00,
180 0x00
181 })
182
183 Return(UPCP)
184 }
185
186 Method(_PLD,0,Serialized)
187 {
188 Name(PLDP, Package()
189 {
190 Buffer(0x14)
191 {
192 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
193 0x82, 0x00, 0x00, 0x00,
194 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
195 0x00, 0x00, 0x00, 0x00,
196 //95:64 - bit[66:64]=b'000 not visiable/no docking/no lid bit[69:67]=b'000 top bit[71:70]=b'01 Center bit[73:72]=b'00 Left
197 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
198 0x40, 0x08, 0x00, 0x00,
199 //127:96 -bit[96]=0 not Ejectable bit[97]=0 no OSPM Ejection required Bit[105:98]=0 no Cabinet Number
200 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
201 0x00, 0x00, 0x00, 0x00,
202 //159:128 Vert. and Horiz. Offsets not supplied
203 0xFF, 0xFF, 0xFF, 0xFF
204 }
205 })
206
207 Return (PLDP)
208 }
209 }//end of HS02
210 // high speed port 3
211 Device(HS03)
212 {
213 Name(_ADR, 0x03)
214
215 Method(_UPC,0,Serialized)
216 {
217 Name(UPCP, Package()
218 {
219 0xFF, // connectable
220 0xFF,
221 0x00,
222 0x00
223 })
224
225 Return(UPCP)
226 }
227
228 Method(_RMV, 0) // for XHCICV debug purpose
229 {
230 Return(0x0)
231 }
232
233 Method(_PLD,0,Serialized)
234 {
235 Name(PLDP, Package()
236 {
237 Buffer(0x14)
238 {
239 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
240 0x82, 0x00, 0x00, 0x00,
241 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
242 0x00, 0x00, 0x00, 0x00,
243 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
244 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
245 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
246 0x30, 0x08, 0x00, 0x00,
247 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
248 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
249 0x00, 0x00, 0x00, 0x00,
250 //159:128 Vert. and Horiz. Offsets not supplied
251 0xFF, 0xFF, 0xFF, 0xFF
252 }
253 })
254 Return (PLDP)
255 }
256 }
257
258 Device(HS04)
259 {
260 Name(_ADR, 0x04)
261
262 Method(_UPC,0,Serialized)
263 {
264 Name(UPCP, Package()
265 {
266 0xFF, //connectable
267 0xFF, //Proprietary connector (FPC connector)
268 0x00,
269 0x00
270 })
271
272 Return(UPCP)
273 }
274 Method(_PLD,0,Serialized)
275 {
276 Name(PLDP, Package()
277 {
278 Buffer(0x14)
279 {
280 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
281 0x82, 0x00, 0x00, 0x00,
282 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
283 0x00, 0x00, 0x00, 0x00,
284 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
285 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
286 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
287 0x30, 0x08, 0x00, 0x00,
288 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
289 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
290 0x00, 0x00, 0x00, 0x00,
291 //159:128 Vert. and Horiz. Offsets not supplied
292 0xFF, 0xFF, 0xFF, 0xFF
293 }
294 })
295
296 Return (PLDP)
297 }
298 }
299
300
301 Device(HSC1) // USB2 HSIC 01
302 {
303 Name(_ADR, 0x05)
304
305 Method(_UPC,0,Serialized)
306 {
307 Name(UPCP, Package()
308 {
309 0xFF, //connectable
310 0xFF, //Proprietary connector (FPC connector)
311 0x00,
312 0x00
313 })
314
315 Return(UPCP)
316 }
317 Method(_PLD,0,Serialized)
318 {
319 Name(PLDP, Package()
320 {
321 Buffer(0x14)
322 {
323 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
324 0x82, 0x00, 0x00, 0x00,
325 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
326 0x00, 0x00, 0x00, 0x00,
327 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
328 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
329 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
330 0x30, 0x08, 0x00, 0x00,
331 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
332 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
333 0x00, 0x00, 0x00, 0x00,
334 //159:128 Vert. and Horiz. Offsets not supplied
335 0xFF, 0xFF, 0xFF, 0xFF
336 }
337 })
338 Return (PLDP)
339 }
340 }
341
342 Device(HSC2) // USB2 HSIC 02
343 {
344 Name(_ADR, 0x06)
345
346 Method(_UPC,0,Serialized)
347 {
348 Name(UPCP, Package()
349 {
350 0xFF, //connectable
351 0xFF, //Proprietary connector (FPC connector)
352 0x00,
353 0x00
354 })
355
356 Return(UPCP)
357 }
358 Method(_PLD,0,Serialized)
359 {
360 Name(PLDP, Package()
361 {
362 Buffer(0x14)
363 {
364 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
365 0x82, 0x00, 0x00, 0x00,
366 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
367 0x00, 0x00, 0x00, 0x00,
368 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
369 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
370 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
371 0x30, 0x08, 0x00, 0x00,
372 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
373 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
374 0x00, 0x00, 0x00, 0x00,
375 //159:128 Vert. and Horiz. Offsets not supplied
376 0xFF, 0xFF, 0xFF, 0xFF
377 }
378 })
379 Return (PLDP)
380 }
381 }
382 } //end of root hub
383
384} // end of XHC1
385