Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /**************************************************************************;
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| 2 | ;* *;
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| 3 | ;* *;
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| 4 | ;* Intel Corporation - ACPI Reference Code for the Haswell *;
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| 5 | ;* Family of Customer Reference Boards. *;
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| 6 | ;* *;
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| 7 | ;* *;
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| 8 | ;* Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved *;
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| 9 | ;
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| 10 | ; This program and the accompanying materials are licensed and made available under
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| 11 | ; the terms and conditions of the BSD License that accompanies this distribution.
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| 12 | ; The full text of the license may be found at
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| 13 | ; http://opensource.org/licenses/bsd-license.php.
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| 14 | ;
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| 15 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 16 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 17 | ;
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| 18 | ;* *;
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| 19 | ;* *;
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| 20 | ;**************************************************************************/
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| 21 |
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| 22 | //scope is \_SB.PCI0.XHC
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| 23 | Device(XHC1)
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| 24 | {
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| 25 | Name(_ADR, 0x00140000) //Device 20, Function 0
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| 26 |
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| 27 | //When it is in Host mode, USH core is connected to USB3 microAB(USB3 P1 and USB2 P0)
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| 28 | Name (_DDN, "Baytrail XHCI controller (CCG core/Host only)" )
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| 29 |
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| 30 | Method(XDEP, 0)
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| 31 | {
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| 32 | If(LEqual(OSYS,2013))
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| 33 | {
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| 34 | Name(_DEP, Package(0x1)
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| 35 | {
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| 36 | PEPD
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| 37 | })
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| 38 | }
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| 39 | }
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| 40 |
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| 41 | Name (_STR, Unicode ("Baytrail XHCI controller (CCG core/Host only)"))
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| 42 | Name(_PRW, Package() {0xD,4})
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| 43 |
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| 44 | Method(_PSW,1)
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| 45 | {
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| 46 | If (LAnd (PMES, PMEE)) {
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| 47 | Store (0, PMEE)
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| 48 | Store (1, PMES)
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| 49 | }
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| 50 | }
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| 51 |
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| 52 | OperationRegion (PMEB, PCI_Config, 0x74, 0x04) // Power Management Control/Status
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| 53 | Field (PMEB, WordAcc, NoLock, Preserve)
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| 54 | {
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| 55 | , 8,
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| 56 | PMEE, 1, //bit8 PME_En
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| 57 | , 6,
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| 58 | PMES, 1 //bit15 PME_Status
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| 59 | }
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| 60 |
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| 61 | Method(_STA, 0)
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| 62 | {
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| 63 | If(LNotEqual(XHCI, 0)) //NVS variable controls present of XHCI controller
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| 64 | {
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| 65 | Return (0xF)
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| 66 | } Else
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| 67 | {
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| 68 | Return (0x0)
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| 69 | }
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| 70 | }
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| 71 |
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| 72 | OperationRegion(XPRT,PCI_Config,0xD0,0x10)
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| 73 | Field(XPRT,DWordAcc,NoLock,Preserve) //usbx_top.doc.xml
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| 74 | {
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| 75 | PR2, 32, //bit[8:0] USB2HCSEL
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| 76 | PR2M, 32, //bit[8:0] USB2HCSELM
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| 77 | PR3, 32, //bit[3:0] USB3SSEN
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| 78 | PR3M, 32 //bit[3:0] USB3SSENM
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| 79 | }
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| 80 |
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| 81 | Device(RHUB)
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| 82 | {
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| 83 | Name(_ADR, Zero) //address 0 is reserved for root hub
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| 84 |
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| 85 | //
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| 86 | // Super Speed Ports - must match _UPC declarations of the coresponding Full Speed Ports.
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| 87 | // Paired with Port 1
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| 88 | Device(SSP1)
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| 89 | {
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| 90 | Name(_ADR, 0x07)
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| 91 |
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| 92 | Method(_UPC,0,Serialized)
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| 93 | {
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| 94 | Name(UPCP, Package()
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| 95 | {
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| 96 | 0xFF, // Port is connectable if non-zero
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| 97 | 0x06, // USB3 uAB connector
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| 98 | 0x00,
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| 99 | 0x00
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| 100 | })
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| 101 | Return(UPCP)
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| 102 | }
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| 103 |
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| 104 | Method(_PLD,0,Serialized)
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| 105 | {
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| 106 | Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8
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| 107 | {
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| 108 | Buffer(0x14)
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| 109 | {
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| 110 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 111 | 0x82, 0x00, 0x00, 0x00,
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| 112 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 113 | 0x00, 0x00, 0x00, 0x00,
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| 114 | //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center
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| 115 | // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 116 | 0x4B, 0x19, 0x00, 0x00,
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| 117 | //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number
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| 118 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 119 | 0x03, 0x00, 0x00, 0x00,
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| 120 | //159:128 Vert. and Horiz. Offsets not supplied
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| 121 | 0xFF, 0xFF, 0xFF, 0xFF
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| 122 | }
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| 123 | })
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| 124 | Return (PLDP)
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| 125 | }
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| 126 | }
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| 127 | //
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| 128 | // High Speed Ports
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| 129 | // pair port with port 7 (SS)
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| 130 | // The UPC declarations for LS/FS/HS and SS ports that are paired to form a USB3.0 compatible connector.
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| 131 | // A "pair" is defined by two ports that declare _PLDs with identical Panel, Vertical Position, Horizontal Postion, Shape, Group Orientation
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| 132 | // and Group Token
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| 133 | Device(HS01)
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| 134 | {
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| 135 | Name(_ADR, 0x01)
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| 136 |
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| 137 | Method(_UPC,0,Serialized)
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| 138 | {
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| 139 | Name(UPCP, Package() { 0xFF,0x06,0x00,0x00 })
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| 140 | Return(UPCP)
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| 141 | }
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| 142 |
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| 143 | Method(_PLD,0,Serialized)
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| 144 | {
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| 145 | Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8
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| 146 | {
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| 147 | Buffer(0x14)
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| 148 | {
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| 149 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 150 | 0x82, 0x00, 0x00, 0x00,
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| 151 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 152 | 0x00, 0x00, 0x00, 0x00,
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| 153 | //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center
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| 154 | // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 155 | 0x4B, 0x19, 0x00, 0x00,
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| 156 | //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number
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| 157 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 158 | 0x03, 0x00, 0x00, 0x00,
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| 159 | //159:128 Vert. and Horiz. Offsets not supplied
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| 160 | 0xFF, 0xFF, 0xFF, 0xFF
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| 161 | }
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| 162 | })
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| 163 | Return (PLDP)
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| 164 | }
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| 165 | }//end of HS01
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| 166 |
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| 167 | // USB2 Type-A/USB2 only
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| 168 | // EHCI debug capable
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| 169 | Device(HS02)
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| 170 | {
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| 171 | Name(_ADR, 0x02) // 0 is for root hub so physical port index starts from 1 (it is port1 in schematic)
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| 172 |
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| 173 | Method(_UPC,0,Serialized)
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| 174 | {
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| 175 | Name(UPCP, Package()
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| 176 | {
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| 177 | 0xFF, // connectable
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| 178 | 0xFF, //
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| 179 | 0x00,
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| 180 | 0x00
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| 181 | })
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| 182 |
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| 183 | Return(UPCP)
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| 184 | }
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| 185 |
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| 186 | Method(_PLD,0,Serialized)
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| 187 | {
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| 188 | Name(PLDP, Package()
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| 189 | {
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| 190 | Buffer(0x14)
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| 191 | {
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| 192 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 193 | 0x82, 0x00, 0x00, 0x00,
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| 194 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 195 | 0x00, 0x00, 0x00, 0x00,
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| 196 | //95:64 - bit[66:64]=b'000 not visiable/no docking/no lid bit[69:67]=b'000 top bit[71:70]=b'01 Center bit[73:72]=b'00 Left
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| 197 | // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 198 | 0x40, 0x08, 0x00, 0x00,
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| 199 | //127:96 -bit[96]=0 not Ejectable bit[97]=0 no OSPM Ejection required Bit[105:98]=0 no Cabinet Number
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| 200 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 201 | 0x00, 0x00, 0x00, 0x00,
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| 202 | //159:128 Vert. and Horiz. Offsets not supplied
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| 203 | 0xFF, 0xFF, 0xFF, 0xFF
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| 204 | }
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| 205 | })
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| 206 |
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| 207 | Return (PLDP)
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| 208 | }
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| 209 | }//end of HS02
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| 210 | // high speed port 3
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| 211 | Device(HS03)
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| 212 | {
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| 213 | Name(_ADR, 0x03)
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| 214 |
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| 215 | Method(_UPC,0,Serialized)
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| 216 | {
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| 217 | Name(UPCP, Package()
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| 218 | {
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| 219 | 0xFF, // connectable
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| 220 | 0xFF,
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| 221 | 0x00,
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| 222 | 0x00
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| 223 | })
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| 224 |
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| 225 | Return(UPCP)
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| 226 | }
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| 227 |
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| 228 | Method(_RMV, 0) // for XHCICV debug purpose
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| 229 | {
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| 230 | Return(0x0)
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| 231 | }
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| 232 |
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| 233 | Method(_PLD,0,Serialized)
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| 234 | {
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| 235 | Name(PLDP, Package()
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| 236 | {
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| 237 | Buffer(0x14)
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| 238 | {
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| 239 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 240 | 0x82, 0x00, 0x00, 0x00,
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| 241 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 242 | 0x00, 0x00, 0x00, 0x00,
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| 243 | //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
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| 244 | // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
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| 245 | // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 246 | 0x30, 0x08, 0x00, 0x00,
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| 247 | //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
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| 248 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 249 | 0x00, 0x00, 0x00, 0x00,
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| 250 | //159:128 Vert. and Horiz. Offsets not supplied
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| 251 | 0xFF, 0xFF, 0xFF, 0xFF
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| 252 | }
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| 253 | })
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| 254 | Return (PLDP)
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| 255 | }
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| 256 | }
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| 257 |
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| 258 | Device(HS04)
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| 259 | {
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| 260 | Name(_ADR, 0x04)
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| 261 |
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| 262 | Method(_UPC,0,Serialized)
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| 263 | {
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| 264 | Name(UPCP, Package()
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| 265 | {
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| 266 | 0xFF, //connectable
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| 267 | 0xFF, //Proprietary connector (FPC connector)
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| 268 | 0x00,
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| 269 | 0x00
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| 270 | })
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| 271 |
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| 272 | Return(UPCP)
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| 273 | }
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| 274 | Method(_PLD,0,Serialized)
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| 275 | {
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| 276 | Name(PLDP, Package()
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| 277 | {
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| 278 | Buffer(0x14)
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| 279 | {
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| 280 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 281 | 0x82, 0x00, 0x00, 0x00,
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| 282 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 283 | 0x00, 0x00, 0x00, 0x00,
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| 284 | //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
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| 285 | // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
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| 286 | // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 287 | 0x30, 0x08, 0x00, 0x00,
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| 288 | //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
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| 289 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 290 | 0x00, 0x00, 0x00, 0x00,
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| 291 | //159:128 Vert. and Horiz. Offsets not supplied
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| 292 | 0xFF, 0xFF, 0xFF, 0xFF
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| 293 | }
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| 294 | })
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| 295 |
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| 296 | Return (PLDP)
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| 297 | }
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| 298 | }
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| 299 |
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| 300 |
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| 301 | Device(HSC1) // USB2 HSIC 01
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| 302 | {
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| 303 | Name(_ADR, 0x05)
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| 304 |
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| 305 | Method(_UPC,0,Serialized)
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| 306 | {
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| 307 | Name(UPCP, Package()
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| 308 | {
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| 309 | 0xFF, //connectable
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| 310 | 0xFF, //Proprietary connector (FPC connector)
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| 311 | 0x00,
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| 312 | 0x00
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| 313 | })
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| 314 |
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| 315 | Return(UPCP)
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| 316 | }
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| 317 | Method(_PLD,0,Serialized)
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| 318 | {
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| 319 | Name(PLDP, Package()
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| 320 | {
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| 321 | Buffer(0x14)
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| 322 | {
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| 323 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 324 | 0x82, 0x00, 0x00, 0x00,
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| 325 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 326 | 0x00, 0x00, 0x00, 0x00,
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| 327 | //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
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| 328 | // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
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| 329 | // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 330 | 0x30, 0x08, 0x00, 0x00,
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| 331 | //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
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| 332 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 333 | 0x00, 0x00, 0x00, 0x00,
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| 334 | //159:128 Vert. and Horiz. Offsets not supplied
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| 335 | 0xFF, 0xFF, 0xFF, 0xFF
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| 336 | }
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| 337 | })
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| 338 | Return (PLDP)
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| 339 | }
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| 340 | }
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| 341 |
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| 342 | Device(HSC2) // USB2 HSIC 02
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| 343 | {
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| 344 | Name(_ADR, 0x06)
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| 345 |
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| 346 | Method(_UPC,0,Serialized)
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| 347 | {
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| 348 | Name(UPCP, Package()
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| 349 | {
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| 350 | 0xFF, //connectable
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| 351 | 0xFF, //Proprietary connector (FPC connector)
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| 352 | 0x00,
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| 353 | 0x00
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| 354 | })
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| 355 |
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| 356 | Return(UPCP)
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| 357 | }
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| 358 | Method(_PLD,0,Serialized)
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| 359 | {
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| 360 | Name(PLDP, Package()
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| 361 | {
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| 362 | Buffer(0x14)
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| 363 | {
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| 364 | //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored
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| 365 | 0x82, 0x00, 0x00, 0x00,
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| 366 | //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000
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| 367 | 0x00, 0x00, 0x00, 0x00,
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| 368 | //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)
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| 369 | // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore
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| 370 | // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay
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| 371 | 0x30, 0x08, 0x00, 0x00,
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| 372 | //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number
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| 373 | // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order
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| 374 | 0x00, 0x00, 0x00, 0x00,
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| 375 | //159:128 Vert. and Horiz. Offsets not supplied
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| 376 | 0xFF, 0xFF, 0xFF, 0xFF
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| 377 | }
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| 378 | })
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| 379 | Return (PLDP)
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| 380 | }
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| 381 | }
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| 382 | } //end of root hub
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| 383 |
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| 384 | } // end of XHC1
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| 385 |
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