Vishal Bhoj | 82c8071 | 2015-12-15 21:13:33 +0530 | [diff] [blame^] | 1 | /**************************************************************************;
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| 2 | ;* *;
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| 3 | ;* *;
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| 4 | ;* Intel Corporation - ACPI Reference Code for the Baytrail *;
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| 5 | ;* Family of Customer Reference Boards. *;
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| 6 | ;* *;
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| 7 | ;* *;
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| 8 | ;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
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| 9 | ;
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| 10 | ; This program and the accompanying materials are licensed and made available under
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| 11 | ; the terms and conditions of the BSD License that accompanies this distribution.
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| 12 | ; The full text of the license may be found at
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| 13 | ; http://opensource.org/licenses/bsd-license.php.
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| 14 | ;
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| 15 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 16 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 17 | ;
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| 18 | ;* *;
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| 19 | ;* *;
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| 20 | ;**************************************************************************/
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| 21 | DefinitionBlock (
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| 22 | "Rtd3.aml",
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| 23 | "SSDT",
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| 24 | 1,
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| 25 | "AcpiRef",
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| 26 | "Msg_Rtd3",
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| 27 | 0x1000
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| 28 | )
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| 29 | {
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| 30 | External(RTD3) //flag if RTD3 is enabled
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| 31 |
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| 32 | If(LEqual(RTD3,1))
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| 33 | {
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| 34 | Scope (\_SB)
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| 35 | {
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| 36 | Name(OSCI, 0) // \_SB._OSC DWORD2 input
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| 37 | Name(OSCO, 0) // \_SB._OSC DWORD2 output
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| 38 |
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| 39 | //Arg0 -- A buffer containing UUID
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| 40 | //Arg1 -- An Interger containing a Revision ID of the buffer format
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| 41 | //Arg2 -- An interger containing a count of entries in Arg3
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| 42 | //Arg3 -- A buffer containing a list of DWORD capacities
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| 43 | Method(_OSC, 4, NotSerialized)
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| 44 | {
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| 45 | // Check for proper UUID
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| 46 | If(LEqual(Arg0, ToUUID("0811B06E-4A27-44F9-8D60-3CBBC22E7B48")))
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| 47 | {
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| 48 | CreateDWordField(Arg3,0,CDW1) //bit1,2 is always clear
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| 49 | CreateDWordField(Arg3,4,CDW2) //Table 6-147 from ACPI spec
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| 50 |
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| 51 | Store(CDW2, OSCI) // Save DWord2
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| 52 | Or(OSCI, 0x4, OSCO) // Only allow _PR3 support
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| 53 |
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| 54 | If(LNotEqual(Arg1,One))
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| 55 | {
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| 56 | Or(CDW1,0x08,CDW1) // Unknown revision
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| 57 | }
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| 58 |
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| 59 | If(LNotEqual(OSCI, OSCO))
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| 60 | {
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| 61 | Or(CDW1,0x10,CDW1) // Capabilities bits were masked
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| 62 | }
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| 63 |
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| 64 | Store(OSCO, CDW2) // Replace DWord2
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| 65 | Return(Arg3)
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| 66 | } Else
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| 67 | {
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| 68 | Or(CDW1,4,CDW1) // Unrecognized UUID
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| 69 | Return(Arg3)
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| 70 | }
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| 71 | }// End _OSC
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| 72 | }
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| 73 | }//end of RTD3 condition
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| 74 |
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| 75 |
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| 76 | //USB RTD3 code
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| 77 | If(LEqual(RTD3,1))
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| 78 | {
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| 79 | Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR13)
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| 80 | {
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| 81 | Name(_PR0, Package() {\PR34})
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| 82 | Name(_PR3, Package() {\PR34})
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| 83 |
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| 84 | Method(_S0W, 0)
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| 85 | {
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| 86 | If(And(\_SB.OSCO, 0x04)) // PMEs can be genrated from D3cold
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| 87 | {
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| 88 | Return(4) // OS comprehends D3cold, as described via \_SB._OSC
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| 89 | } Else
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| 90 | {
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| 91 | Return(3)
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| 92 | }
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| 93 | } // End _S0W
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| 94 | }
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| 95 |
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| 96 | Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR14)
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| 97 | {
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| 98 | Name(_PR0, Package() {\PR34})
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| 99 | Name(_PR3, Package() {\PR34})
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| 100 |
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| 101 | Method(_S0W, 0)
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| 102 | {
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| 103 | If(And(\_SB.OSCO, 0x04))
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| 104 | {
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| 105 | Return(4)
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| 106 | } Else
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| 107 | {
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| 108 | Return(3)
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| 109 | }
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| 110 | } // End _S0W
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| 111 | }
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| 112 |
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| 113 |
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| 114 | Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR15)
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| 115 | {
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| 116 | Name(_PR0, Package() {\PR56})
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| 117 | Name(_PR3, Package() {\PR56})
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| 118 |
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| 119 | Method(_S0W, 0)
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| 120 | {
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| 121 | If(And(\_SB.OSCO, 0x04))
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| 122 | {
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| 123 | Return(4)
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| 124 | } Else
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| 125 | {
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| 126 | Return(3)
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| 127 | }
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| 128 | } // End _S0W
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| 129 | }
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| 130 |
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| 131 | Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR16)
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| 132 | {
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| 133 | Name(_PR0, Package() {\PR56})
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| 134 | Name(_PR3, Package() {\PR56})
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| 135 |
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| 136 | Method(_S0W, 0)
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| 137 | {
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| 138 | If(And(\_SB.OSCO, 0x04))
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| 139 | {
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| 140 | Return(4)
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| 141 | } Else
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| 142 | {
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| 143 | Return(3)
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| 144 | }
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| 145 | } // End _S0W
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| 146 | }
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| 147 |
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| 148 | Scope(\_SB.PCI0.XHC1) // XHCI host only controller
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| 149 | {
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| 150 |
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| 151 | Method(_PS0,0,Serialized) // set device into D0 state
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| 152 | {
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| 153 | }
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| 154 |
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| 155 | Method(_PS3,0,Serialized) // place device into D3H state
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| 156 | {
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| 157 | //write to PMCSR
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| 158 | }
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| 159 |
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| 160 | Method(_DSW, 3,Serialized) // enable or disable the device’s ability to wake a sleeping system.
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| 161 | {
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| 162 | }
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| 163 | }
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| 164 |
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| 165 | Scope(\_SB.PCI0.XHC1.RHUB.HS01)
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| 166 | {
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| 167 |
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| 168 | }
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| 169 |
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| 170 | Scope(\_SB.PCI0.XHC1.RHUB.SSP1)
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| 171 | {
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| 172 |
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| 173 | }
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| 174 |
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| 175 | Scope(\_SB.PCI0.XHC2) // OTG
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| 176 | {
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| 177 |
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| 178 | Method(_PS0,0,Serialized) // set device into D0 state
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| 179 | {
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| 180 | }
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| 181 |
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| 182 | Method(_PS3,0,Serialized) // place device into D3H state
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| 183 | {
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| 184 | //write to PMCSR
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| 185 | }
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| 186 |
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| 187 | Method(_DSW, 3,Serialized) // enable or disable the device’s ability to wake a sleeping system.
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| 188 | {
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| 189 | }
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| 190 | }
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| 191 |
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| 192 | Scope(\_SB.PCI0.XHC2.RHUB.HS01)
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| 193 | {
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| 194 |
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| 195 | }
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| 196 |
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| 197 | Scope(\_SB.PCI0.XHC2.RHUB.SSP1)
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| 198 | {
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| 199 |
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| 200 | }
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| 201 | } //If(LEqual(RTD3,1)) USB
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| 202 |
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| 203 | }//end of SSDT
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