| * Synopsys HSDK SDP CGU clock driver dts bindings |
| * Copyright (C) 2017 Synopsys |
| * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
| * This file is licensed under the terms of the GNU General Public |
| * License version 2. This program is licensed "as is" without any |
| * warranty of any kind, whether express or implied. |
| #ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_ |
| #define __DT_BINDINGS_CLK_HSDK_CGU_H_ |
| #define CLK_SYS_GFX_CORE 10 |
| #define CLK_SYS_GFX_DMA 11 |
| #define CLK_SYS_GFX_CFG 12 |
| #define CLK_SYS_DMAC_CORE 13 |
| #define CLK_SYS_DMAC_CFG 14 |
| #define CLK_SYS_SDIO_REF 15 |
| #define CLK_SYS_SPI_REF 16 |
| #define CLK_SYS_I2C_REF 17 |
| #define CLK_SYS_UART_REF 18 |
| #define CLK_SYS_EBI_REF 19 |
| #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */ |