| // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| * Copyright (C) 2023 Marek Vasut <marex@denx.de> |
| #include <dt-bindings/clock/imx8mp-clock.h> |
| &eqos { /* First ethernet */ |
| pinctrl-0 = <&pinctrl_eqos_rmii>; |
| phy-handle = <ðphy0f>; |
| assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, |
| <&clk IMX8MP_SYS_PLL2_100M>, |
| <&clk IMX8MP_SYS_PLL2_50M>; |
| assigned-clock-rates = <0>, <100000000>, <50000000>; |
| ðphy0g { /* Micrel KSZ9131RNXI */ |
| ðphy0f { /* SMSC LAN8740Ai */ |
| &fec { /* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */ |
| /* No WiFi/BT chipset on this SoM variant. */ |