* Patch by Andrea Scian, 17 Feb 2004:
Add support for S3C44B0 processor and DAVE B2 board
* Patch by Steven Scholz, 20 Feb 2004:
- Add support for MII commands on AT91RM9200 boards
- some cleanup in AT91RM9200 ethernet code
diff --git a/board/dave/B2/Makefile b/board/dave/B2/Makefile
new file mode 100644
index 0000000..c0c3f67
--- /dev/null
+++ b/board/dave/B2/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2002
+# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+# Marius Groeger <mgroeger@sysgo.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := B2.o flash.o
+SOBJS := memsetup.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/dave/B2/config.mk b/board/dave/B2/config.mk
new file mode 100644
index 0000000..5216622
--- /dev/null
+++ b/board/dave/B2/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000
+# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+# Marius Groeger <mgroeger@sysgo.de>
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x0C100000
+
+PLATFORM_CPPFLAGS += -Uarm
diff --git a/board/dave/B2/flash.c b/board/dave/B2/flash.c
new file mode 100644
index 0000000..50aa6aa
--- /dev/null
+++ b/board/dave/B2/flash.c
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/hardware.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+#ifdef __DEBUG_START_FROM_SRAM__
+ return CFG_DUMMY_FLASH_SIZE;
+#else
+ unsigned long size_b0;
+ int i;
+ uint pbcr;
+ unsigned long base_b0;
+ int size_val = 0;
+
+ /* Init: no FLASHes known */
+ for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ }
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+
+ size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+ size_b0, size_b0<<20);
+ }
+
+ /* Setup offsets */
+ flash_get_offsets (0, &flash_info[0]);
+
+ /* Monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ -CFG_MONITOR_LEN,
+ 0xffffffff,
+ &flash_info[0]);
+
+ flash_info[0].size = size_b0;
+
+ return (size_b0);
+#endif
+}
diff --git a/board/dave/B2/memsetup.S b/board/dave/B2/memsetup.S
new file mode 100644
index 0000000..3f64cb3
--- /dev/null
+++ b/board/dave/B2/memsetup.S
@@ -0,0 +1,167 @@
+/*
+ * (C) Copyright 2004
+ * DAVE Srl
+ *
+ * http://www.dave-tech.it
+ * http://www.wawnet.biz
+ * mailto:info@wawnet.biz
+ *
+ * memsetup-sa1110.S (blob): memory setup for various SA1110 architectures
+ * Modified By MATTO
+ *
+ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Documentation:
+ * Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+ * Advanced Developer's manual, December 1999
+ *
+ * Intel has a very hard to find SDRAM configurator on their web site:
+ * http://appzone.intel.com/hcd/sa1110/memory/index.asp
+ *
+ * NOTE: This code assumes that an SA1110 CPU *always* uses SDRAM. This
+ * appears to be true, but it might be possible that somebody designs a
+ * board with mixed EDODRAM/SDRAM memory (which is a bad idea). -- Erik
+ *
+ * 04-10-2001: SELETZ
+ * - separated memory config for multiple platform support
+ * - perform SA1110 Hardware Reset Procedure
+ *
+ */
+
+.equ B0_Tacs, 0x0 /* 0clk */
+.equ B0_Tcos, 0x0 /* 0clk */
+.equ B0_Tacc, 0x4 /* 6clk */
+.equ B0_Tcoh, 0x0 /* 0clk */
+.equ B0_Tah, 0x0 /* 0clk */
+.equ B0_Tacp, 0x0 /* 0clk */
+.equ B0_PMC, 0x0 /* normal(1data) */
+/* Bank 1 parameter */
+.equ B1_Tacs, 0x3 /* 4clk */
+.equ B1_Tcos, 0x3 /* 4clk */
+.equ B1_Tacc, 0x7 /* 14clkv */
+.equ B1_Tcoh, 0x3 /* 4clk */
+.equ B1_Tah, 0x3 /* 4clk */
+.equ B1_Tacp, 0x3 /* 6clk */
+.equ B1_PMC, 0x0 /* normal(1data) */
+
+/* Bank 2 parameter - LAN91C96 */
+.equ B2_Tacs, 0x3 /* 4clk */
+.equ B2_Tcos, 0x3 /* 4clk */
+.equ B2_Tacc, 0x7 /* 14clk */
+.equ B2_Tcoh, 0x3 /* 4clk */
+.equ B2_Tah, 0x3 /* 4clk */
+.equ B2_Tacp, 0x3 /* 6clk */
+.equ B2_PMC, 0x0 /* normal(1data) */
+
+/* Bank 3 parameter */
+.equ B3_Tacs, 0x3 /* 4clk */
+.equ B3_Tcos, 0x3 /* 4clk */
+.equ B3_Tacc, 0x7 /* 14clk */
+.equ B3_Tcoh, 0x3 /* 4clk */
+.equ B3_Tah, 0x3 /* 4clk */
+.equ B3_Tacp, 0x3 /* 6clk */
+.equ B3_PMC, 0x0 /* normal(1data) */
+
+/* Bank 4 parameter */
+.equ B4_Tacs, 0x3 /* 4clk */
+.equ B4_Tcos, 0x3 /* 4clk */
+.equ B4_Tacc, 0x7 /* 14clk */
+.equ B4_Tcoh, 0x3 /* 4clk */
+.equ B4_Tah, 0x3 /* 4clk */
+.equ B4_Tacp, 0x3 /* 6clk */
+.equ B4_PMC, 0x0 /* normal(1data) */
+
+/* Bank 5 parameter */
+.equ B5_Tacs, 0x3 /* 4clk */
+.equ B5_Tcos, 0x3 /* 4clk */
+.equ B5_Tacc, 0x7 /* 14clk */
+.equ B5_Tcoh, 0x3 /* 4clk */
+.equ B5_Tah, 0x3 /* 4clk */
+.equ B5_Tacp, 0x3 /* 6clk */
+.equ B5_PMC, 0x0 /* normal(1data) */
+
+/* Bank 6(if SROM) parameter */
+.equ B6_Tacs, 0x3 /* 4clk */
+.equ B6_Tcos, 0x3 /* 4clk */
+.equ B6_Tacc, 0x7 /* 14clk */
+.equ B6_Tcoh, 0x3 /* 4clk */
+.equ B6_Tah, 0x3 /* 4clk */
+.equ B6_Tacp, 0x3 /* 6clk */
+.equ B6_PMC, 0x0 /* normal(1data) */
+
+/* Bank 7(if SROM) parameter */
+.equ B7_Tacs, 0x3 /* 4clk */
+.equ B7_Tcos, 0x3 /* 4clk */
+.equ B7_Tacc, 0x7 /* 14clk */
+.equ B7_Tcoh, 0x3 /* 4clk */
+.equ B7_Tah, 0x3 /* 4clk */
+.equ B7_Tacp, 0x3 /* 6clk */
+.equ B7_PMC, 0x0 /* normal(1data) */
+
+/* Bank 6 parameter */
+.equ B6_MT, 0x3 /* SDRAM */
+.equ B6_Trcd, 0x0 /* 2clk */
+.equ B6_SCAN, 0x0 /* 10bit */
+
+.equ B7_MT, 0x3 /* SDRAM */
+.equ B7_Trcd, 0x0 /* 2clk */
+.equ B7_SCAN, 0x0 /* 10bit */
+
+
+/* REFRESH parameter */
+.equ REFEN, 0x1 /* Refresh enable */
+.equ TREFMD, 0x0 /* CBR(CAS before RAS)/Auto refresh */
+.equ Trp, 0x0 /* 2clk */
+.equ Trc, 0x3 /* 0x1=5clk 0x3=11clk*/
+.equ Tchr, 0x0 /* 0x2=3clk 0x0=0clks */
+.equ REFCNT, 879
+
+MEMORY_CONFIG:
+ .long 0x12111900 /* Bank0 = OM[1:0] , Bank1-7 16bit, Bank2=Nowait,UB/LB*/
+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /*GCS0*/
+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /*GCS1*/
+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /*GCS2*/
+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /*GCS3*/
+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /*GCS4*/
+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /*GCS5*/
+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /*GCS6*/
+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /*GCS7*/
+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) /*REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019*/
+ .word 0x17 /*SCLK power down mode, BANKSIZE 16M/16M*/
+ .word 0x20 /*MRSR6 CL=2clk*/
+ .word 0x20 /*MRSR7*/
+
+
+.globl memsetup
+memsetup:
+
+ /*
+ the next instruction fail due memory relocation...
+ we'll find the right MEMORY_CONFIG address with the next 3 lines...
+ */
+ /*ldr r0, =MEMORY_CONFIG*/
+ mov r0, pc
+ ldr r1, =(0x38+4)
+ sub r0, r0, r1
+
+ ldmia r0, {r1-r13}
+ ldr r0, =0x01c80000
+ stmia r0, {r1-r13}
+ mov pc, lr
diff --git a/board/dave/B2/u-boot.lds b/board/dave/B2/u-boot.lds
new file mode 100644
index 0000000..d3b6a77
--- /dev/null
+++ b/board/dave/B2/u-boot.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/s3c44b0/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ armboot_end_data = .;
+
+ . = ALIGN(4);
+ .bss : { *(.bss) }
+
+ armboot_end = .;
+}
diff --git a/board/dave/common/flash.c b/board/dave/common/flash.c
index feea093..b0e4116 100644
--- a/board/dave/common/flash.c
+++ b/board/dave/common/flash.c
@@ -22,7 +22,6 @@
*/
#include <common.h>
-#include <ppc4xx.h>
#include <asm/processor.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
@@ -578,15 +577,27 @@
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
+#ifdef CONFIG_B2
+ data = data | ((*(uchar *)cp)<<(8*i));
+#else
data = (data << 8) | (*(uchar *)cp);
+#endif
}
for (; i<4 && cnt>0; ++i) {
+#ifdef CONFIG_B2
+ data = data | ((*src++)<<(8*i));
+#else
data = (data << 8) | *src++;
+#endif
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
+#ifdef CONFIG_B2
+ data = data | ((*(uchar *)cp)<<(8*i));
+#else
data = (data << 8) | (*(uchar *)cp);
+#endif
}
if ((rc = write_word(info, wp, data)) != 0) {
@@ -600,9 +611,14 @@
*/
while (cnt >= 4) {
data = 0;
+#ifdef CONFIG_B2
+ data = (*(ulong*)src);
+ src += 4;
+#else
for (i=0; i<4; ++i) {
data = (data << 8) | *src++;
}
+#endif
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
@@ -619,11 +635,19 @@
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+#ifdef CONFIG_B2
+ data = data | ((*src++)<<(8*i));
+#else
data = (data << 8) | *src++;
+#endif
--cnt;
}
for (; i<4; ++i, ++cp) {
+#ifdef CONFIG_B2
+ data = data | ((*(uchar *)cp)<<(8*i));
+#else
data = (data << 8) | (*(uchar *)cp);
+#endif
}
return (write_word(info, wp, data));