bsec: update after MISC u-class update

Since the commit 8729b1ae2cbd ("misc: Update read() and
write() methods to return bytes xfered"); The misc bsec driver
need to be adapted to reflect the number of transferred bytes.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 8018366..a77c706 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -364,15 +364,13 @@
 		offs -= STM32_BSEC_OTP_OFFSET;
 		shadow = false;
 	}
+
+	if (offs < 0 || (offs % 4) || (size % 4))
+		return -EINVAL;
+
 	otp = offs / sizeof(u32);
 
-	if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) {
-		dev_err(dev, "wrong value for otp, max value : %i\n",
-			BSEC_OTP_MAX_VALUE);
-		return -EINVAL;
-	}
-
-	for (i = otp; i < (otp + nb_otp); i++) {
+	for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) {
 		u32 *addr = &((u32 *)buf)[i - otp];
 
 		if (shadow)
@@ -383,7 +381,10 @@
 		if (ret)
 			break;
 	}
-	return ret;
+	if (ret)
+		return ret;
+	else
+		return (i - otp) * 4;
 }
 
 static int stm32mp_bsec_write(struct udevice *dev, int offset,
@@ -400,15 +401,13 @@
 		offs -= STM32_BSEC_OTP_OFFSET;
 		shadow = false;
 	}
+
+	if (offs < 0 || (offs % 4) || (size % 4))
+		return -EINVAL;
+
 	otp = offs / sizeof(u32);
 
-	if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) {
-		dev_err(dev, "wrong value for otp, max value : %d\n",
-			BSEC_OTP_MAX_VALUE);
-		return -EINVAL;
-	}
-
-	for (i = otp; i < otp + nb_otp; i++) {
+	for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) {
 		u32 *val = &((u32 *)buf)[i - otp];
 
 		if (shadow)
@@ -418,7 +417,10 @@
 		if (ret)
 			break;
 	}
-	return ret;
+	if (ret)
+		return ret;
+	else
+		return (i - otp) * 4;
 }
 
 static const struct misc_ops stm32mp_bsec_ops = {
diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c
index 801d946..a1a27d1 100644
--- a/drivers/misc/stm32mp_fuse.c
+++ b/drivers/misc/stm32mp_fuse.c
@@ -20,7 +20,7 @@
  */
 int fuse_read(u32 bank, u32 word, u32 *val)
 {
-	int ret = 0;
+	int ret;
 	struct udevice *dev;
 
 	switch (bank) {
@@ -32,9 +32,10 @@
 			return ret;
 		ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET,
 				val, 4);
-		if (ret < 0)
-			return ret;
-		ret = 0;
+		if (ret != 4)
+			ret = -EINVAL;
+		else
+			ret = 0;
 		break;
 
 #ifdef CONFIG_PMIC_STPMIC1
@@ -67,9 +68,10 @@
 			return ret;
 		ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET,
 				 &val, 4);
-		if (ret < 0)
-			return ret;
-		ret = 0;
+		if (ret != 4)
+			ret = -EINVAL;
+		else
+			ret = 0;
 		break;
 
 #ifdef CONFIG_PMIC_STPMIC1
@@ -100,9 +102,10 @@
 		if (ret)
 			return ret;
 		ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4);
-		if (ret < 0)
-			return ret;
-		ret = 0;
+		if (ret != 4)
+			ret = -EINVAL;
+		else
+			ret = 0;
 		break;
 
 #ifdef CONFIG_PMIC_STPMIC1
@@ -135,9 +138,10 @@
 			return ret;
 		ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET,
 				 &val, 4);
-		if (ret < 0)
-			return ret;
-		ret = 0;
+		if (ret != 4)
+			ret = -EINVAL;
+		else
+			ret = 0;
 		break;
 
 #ifdef CONFIG_PMIC_STPMIC1