commit 164941c2c444830dfee6d1575207a590dcba8ae4
author Biwen Li <biwen.li@nxp.com> Thu Nov 05 19:28:12 2020 +0800
committer Priyanka Jain <priyanka.jain@nxp.com> Thu Dec 10 13:56:39 2020 +0530
tree a4ec85980bf1ffc873926e8944ef07060b2a845f
parent 4ed00656a99aa3df82397e98c4a7b04d360f2e6b

net: pfe_eth: read PFE ESBC header flash with spi_flash_read API

Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
  Net:   SF: Detected s25fs512s with page size 256 Bytes, erase size 256
  KiB, total 64 MiB
  "Synchronous Abort" handler, esr 0x96000210
  elr: 000000008206db44 lr : 0000000082004ea0 (reloc)
  elr: 00000000b7ba6b44 lr : 00000000b7b3dea0
  x0 : 00000000b79407e8 x1 : 0000000040640000
  x2 : 0000000000000050 x3 : 0000000000000000
  x4 : 000000000000000a x5 : 0000000000000050
  x6 : 0000000000000366 x7 : 00000000b7942308
  x8 : 00000000b76407c0 x9 : 0000000000000008
  x10: 0000000000000044 x11: 00000000b7634d1c
  x12: 000000000000004f x13: 0000000000000044
  x14: 00000000b7634d98 x15: 00000000b76407c0
  x16: 0000000000000000 x17: 0000000000000000
  x18: 00000000b7636dd8 x19: 0000000000000000
  x20: 00000000b79407d0 x21: 00000000b79407e8
  x22: 0000000040640000 x23: 00000000b7634e58
  x24: 0000000000000000 x25: 0000000003800000
  x26: 00000000b7bdd000 x27: 0000000000000000
  x28: 0000000000000000 x29: 00000000b7634d10

  Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826)
  Resetting CPU ...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

board/freescale/ls1012ardb/Kconfig

diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig
index 5a2fa91..c4acea3 100644
--- a/board/freescale/ls1012ardb/Kconfig
+++ b/board/freescale/ls1012ardb/Kconfig
@@ -20,6 +20,14 @@
 config SYS_LS_PPA_ESBC_ADDR
 	hex "PPA Firmware HDR Addr"
 	default 0x40680000
+
+config SYS_LS_PFE_ESBC_ADDR
+	hex "PFE Firmware HDR Addr"
+	default 0x40640000
+
+config SYS_LS_PFE_ESBC_LENGTH
+	hex "length of PFE Firmware HDR"
+	default 0xc00
 endif
 
 if FSL_PFE
@@ -33,9 +41,9 @@
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
 
-config SYS_LS_PFE_ESBC_ADDR
-	hex "PFE Firmware HDR Addr"
-	default 0x40640000
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x300000
 
 config DDR_PFE_PHYS_BASEADDR
 	hex "PFE DDR physical base address"
@@ -89,6 +97,10 @@
 	hex "Flash address of PFE firmware"
 	default 0x40a00000
 
+config SYS_LS_PFE_FW_LENGTH
+	hex "length of PFE firmware"
+	default 0x300000
+
 config DDR_PFE_PHYS_BASEADDR
 	hex "PFE DDR physical base address"
 	default 0x03800000