| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
| */ |
| |
| #include <common.h> |
| #include <cpu_func.h> |
| #include <init.h> |
| #include <asm/cache.h> |
| #include <linux/usb/otg.h> |
| #include <dwc3-sti-glue.h> |
| #include <dwc3-uboot.h> |
| #include <usb.h> |
| |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| int dram_init(void) |
| { |
| gd->ram_size = PHYS_SDRAM_1_SIZE; |
| return 0; |
| } |
| |
| int dram_init_banksize(void) |
| { |
| gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| |
| return 0; |
| } |
| |
| #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
| void enable_caches(void) |
| { |
| /* Enable D-cache. I-cache is already enabled in start.S */ |
| dcache_enable(); |
| } |
| #endif |
| |
| int board_init(void) |
| { |
| return 0; |
| } |
| |
| #ifdef CONFIG_USB_DWC3 |
| static struct dwc3_device dwc3_device_data = { |
| .maximum_speed = USB_SPEED_HIGH, |
| .dr_mode = USB_DR_MODE_PERIPHERAL, |
| .index = 0, |
| }; |
| |
| int usb_gadget_handle_interrupts(int index) |
| { |
| dwc3_uboot_handle_interrupt(index); |
| return 0; |
| } |
| |
| int board_usb_init(int index, enum usb_init_type init) |
| { |
| int node; |
| const void *blob = gd->fdt_blob; |
| |
| /* find the snps,dwc3 node */ |
| node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); |
| |
| dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg"); |
| |
| return dwc3_uboot_init(&dwc3_device_data); |
| } |
| |
| int board_usb_cleanup(int index, enum usb_init_type init) |
| { |
| dwc3_uboot_exit(index); |
| return 0; |
| } |
| |
| int g_dnl_board_usb_cable_connected(void) |
| { |
| return 1; |
| } |
| #endif |