blob: 6c31a17f8cce6a04193ead01302c4c4f71779df1 [file] [log] [blame]
#
# (C) Copyright 2008
# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
#
# SPDX-License-Identifier: GPL-2.0+
#
#
# Altera NIOS delopment board Stratix II edition, FPGA device EP2S60,
# with GRLIB Template design (GPL Open Source SPARC/LEON3)
#
# U-BOOT IN FLASH
CONFIG_SYS_TEXT_BASE = 0x00000000
# U-BOOT IN SDRAM
#CONFIG_SYS_TEXT_BASE = 0x40000000
PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
-I$(TOPDIR)/board