| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright 2020, Compass Electronics Group, LLC |
| */ |
| |
| /dts-v1/; |
| |
| #include "r8a774b1.dtsi" |
| #include "beacon-renesom-som.dtsi" |
| #include "beacon-renesom-baseboard.dtsi" |
| |
| / { |
| model = "Beacon Embedded Works RZ/G2N Development Kit"; |
| compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1"; |
| |
| aliases { |
| serial0 = &scif2; |
| serial1 = &hscif0; |
| serial2 = &hscif1; |
| serial3 = &scif0; |
| serial4 = &hscif2; |
| serial5 = &scif5; |
| serial6 = &scif4; |
| ethernet0 = &avb; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| }; |
| |
| &du { |
| pinctrl-0 = <&du_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| clocks = <&cpg CPG_MOD 724>, |
| <&cpg CPG_MOD 723>, |
| <&cpg CPG_MOD 721>, |
| <&versaclock5 1>, |
| <&x302_clk>, |
| <&versaclock5 2>; |
| clock-names = "du.0", "du.1", "du.3", |
| "dclkin.0", "dclkin.1", "dclkin.3"; |
| }; |
| |
| /* Reference versaclock instead of audio_clk_a */ |
| &rcar_sound { |
| clocks = <&cpg CPG_MOD 1005>, |
| <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, |
| <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, |
| <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, |
| <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, |
| <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, |
| <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, |
| <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, |
| <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, |
| <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, |
| <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| <&versaclock6_bb 4>, <&audio_clk_b>, |
| <&audio_clk_c>, |
| <&cpg CPG_CORE R8A774B1_CLK_S0D4>; |
| }; |