arch/mips/dts/qca953x.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"

/ {
	compatible = "qca,qca953x";

	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "mips,mips24Kc";
			reg = <0>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		xtal: xtal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-output-names = "xtal";
		};
	};

	pinctrl {
		u-boot,dm-pre-reloc;
		compatible = "qca,qca953x-pinctrl";
		ranges;
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x18040000 0x100>;
	};

	ahb {
		compatible = "simple-bus";
		ranges;

		#address-cells = <1>;
		#size-cells = <1>;

		apb {
			compatible = "simple-bus";
			ranges;

			#address-cells = <1>;
			#size-cells = <1>;

			uart0: uart@18020000 {
				compatible = "ns16550";
				reg = <0x18020000 0x20>;
				reg-shift = <2>;
				clock-frequency = <25000000>;
				interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;

				status = "disabled";
			};
		};

		spi0: spi@1f000000 {
			compatible = "qca,ar7100-spi";
			reg = <0x1f000000 0x10>;
			interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};