/{ | |
soc { | |
timer5: timer@40000c00 { | |
u-boot,dm-pre-reloc; | |
}; | |
}; | |
}; | |
&pinctrl { | |
usart1_pins_a: usart1@0 { | |
u-boot,dm-pre-reloc; | |
pins1 { | |
u-boot,dm-pre-reloc; | |
}; | |
pins2 { | |
u-boot,dm-pre-reloc; | |
}; | |
}; | |
fmc_pins: fmc@0 { | |
u-boot,dm-pre-reloc; | |
pins | |
{ | |
u-boot,dm-pre-reloc; | |
}; | |
}; | |
}; | |
&fmc { | |
bank1: bank@0 { | |
u-boot,dm-pre-reloc; | |
}; | |
}; | |
&pwrcfg { | |
u-boot,dm-pre-reloc; | |
}; | |
&clk_hse { | |
u-boot,dm-pre-reloc; | |
}; |