| Overview |
| -------- |
| MPC8572DS is a high-performance computing, evaluation and development platform |
| supporting the mpc8572 PowerTM processor. |
| |
| Building U-boot |
| ----------- |
| make MPC8572DS_config |
| make |
| |
| Flash Banks |
| ----------- |
| MPC8572DS board has two flash banks. They are both present on boot, but their |
| locations can be swapped using the dip-switch SW9[1:2]. |
| |
| Booting is always from the boot bank at 0xec00_0000. |
| |
| |
| Memory Map |
| ---------- |
| |
| 0xe800_0000 - 0xebff_ffff Alernate bank 64MB |
| 0xec00_0000 - 0xefff_ffff Boot bank 64MB |
| |
| 0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB |
| 0xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB |
| |
| |
| Flashing Images |
| --------------- |
| |
| To place a new u-boot image in the alternate flash bank and then reset with that |
| new image temporarily, use this: |
| |
| tftp 1000000 u-boot.bin |
| erase ebf80000 ebffffff |
| cp.b 1000000 ebf80000 80000 |
| pixis_reset altbank |
| |
| |
| To program the image in the boot flash bank: |
| |
| tftp 1000000 u-boot.bin |
| protect off all |
| erase eff80000 ffffffff |
| cp.b 1000000 eff80000 80000 |
| |
| |
| The pixis_reset command |
| ----------------------- |
| The command - "pixis_reset", is introduced to reset mpc8572ds board |
| using the FPGA sequencer. When the board restarts, it has the option |
| of using either the current or alternate flash bank as the boot |
| image, with or without the watchdog timer enabled, and finally with |
| or without frequency changes. |
| |
| Usage is; |
| |
| pixis_reset |
| pixis_reset altbank |
| pixis_reset altbank wd |
| pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| |
| Examples: |
| |
| /* reset to current bank, like "reset" command */ |
| pixis_reset |
| |
| /* reset board but use the to alternate flash bank */ |
| pixis_reset altbank |
| |
| |
| Using the Device Tree Source File |
| --------------------------------- |
| To create the DTB (Device Tree Binary) image file, |
| use a command similar to this: |
| |
| dtc -b 0 -f -I dts -O dtb mpc8572ds.dts > mpc8572ds.dtb |
| |
| Likely, that .dts file will come from here; |
| |
| linux-2.6/arch/powerpc/boot/dts/mpc8572ds.dts |
| |
| |
| Booting Linux |
| ------------- |
| |
| Place a linux uImage in the TFTP disk area. |
| |
| tftp 1000000 uImage.8572 |
| tftp c00000 mpc8572ds.dtb |
| bootm 1000000 - c00000 |
| |
| |
| Implementing AMP(Asymmetric MultiProcessing) |
| ------------- |
| 1. Build kernel image for core0: |
| |
| a. $ make 85xx/mpc8572_ds_defconfig |
| |
| b. $ make menuconfig |
| - un-select "Processor support"->"Symetric multi-processing support" |
| |
| c. $ make uImage |
| |
| d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0 |
| |
| 2. Build kernel image for core1: |
| |
| a. $ make 85xx/mpc8572_ds_defconfig |
| |
| b. $ make menuconfig |
| - Un-select "Processor support"->"Symetric multi-processing support" |
| - Select "Advanced setup" -> " Prompt for advanced kernel |
| configuration options" |
| - Select "Set physical address where the kernel is loaded" and |
| set it to 0x20000000, asssuming core1 will start from 512MB. |
| - Select "Set custom page offset address" |
| - Select "Set custom kernel base address" |
| - Select "Set maximum low memory" |
| - "Exit" and save the selection. |
| |
| c. $ make uImage |
| |
| d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1 |
| |
| 3. Create dtb for core0: |
| |
| $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb |
| |
| 4. Create dtb for core1: |
| |
| $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb |
| |
| 5. Bring up two cores separately: |
| |
| a. Power on the board, under u-boot prompt: |
| => setenv <serverip> |
| => setenv <ipaddr> |
| => setenv bootargs root=/dev/ram rw console=ttyS0,115200 |
| b. Bring up core1's kernel first: |
| => setenv bootm_low 0x20000000 |
| => setenv bootm_size 0x10000000 |
| => tftp 21000000 8572/uImage.core1 |
| => tftp 22000000 8572/ramdiskfile |
| => tftp 20c00000 8572/mpc8572ds_core1.dtb |
| => interrupts off |
| => bootm start 21000000 22000000 20c00000 |
| => bootm loados |
| => bootm ramdisk |
| => bootm fdt |
| => fdt boardsetup |
| => fdt chosen $initrd_start $initrd_end |
| => bootm prep |
| => cpu 1 release $bootm_low - $fdtaddr - |
| c. Bring up core0's kernel(on the same u-boot console): |
| => setenv bootm_low 0 |
| => setenv bootm_size 0x20000000 |
| => tftp 1000000 8572/uImage.core0 |
| => tftp 2000000 8572/ramdiskfile |
| => tftp c00000 8572/mpc8572ds_core0.dtb |
| => bootm 1000000 2000000 c00000 |
| |
| Please note only core0 will run u-boot, core1 starts kernel directly after |
| "cpu release" command is issued. |
| |