| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Copyright (C) 2019 MediaTek Inc. |
| * |
| * Author: Weijie Gao <weijie.gao@mediatek.com> |
| */ |
| |
| #ifndef _DT_BINDINGS_MT7628_RESET_H_ |
| #define _DT_BINDINGS_MT7628_RESET_H_ |
| |
| #define MT7628_PWM_RST 31 |
| #define MT7628_SDXC_RST 30 |
| #define MT7628_CRYPTO_RST 29 |
| #define MT7628_AUX_STCK_RST 28 |
| #define MT7628_PCIE_RST 26 |
| #define MT7628_EPHY_RST 24 |
| #define MT7628_ETH_RST 23 |
| #define MT7628_UPHY_RST 22 |
| #define MT7628_UART2_RST 20 |
| #define MT7628_UART1_RST 19 |
| #define MT7628_SPI_RST 18 |
| #define MT7628_I2S_RST 17 |
| #define MT7628_I2C_RST 16 |
| #define MT7628_GDMA_RST 14 |
| #define MT7628_PIO_RST 13 |
| #define MT7628_UART0_RST 12 |
| #define MT7628_PCM_RST 11 |
| #define MT7628_MC_RST 10 |
| #define MT7628_INT_RST 9 |
| #define MT7628_TIMER_RST 8 |
| #define MT7628_HIF_RST 5 |
| #define MT7628_WIFI_RST 4 |
| #define MT7628_SPIS_RST 3 |
| #define MT7628_SYS_RST 0 |
| |
| #endif /* _DT_BINDINGS_MT7628_RESET_H_ */ |