include/configs/mx6ul_14x14_evk.h - platform/external/u-boot - Gitiles

 /*
  * Copyright (C) 2015 Freescale Semiconductor, Inc.
  *
  * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef __MX6UL_14X14_EVK_CONFIG_H
 #define __MX6UL_14X14_EVK_CONFIG_H


 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 #include "mx6_common.h"
 #include <asm/imx-common/gpio.h>

 #define is_mx6ul_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)

 /* SPL options */
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
 #include "imx6_spl.h"

 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)

 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT

 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE		UART1_BASE

 /* MMC Configs */
 #ifdef CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

 /* NAND pin conflicts with usdhc2 */
 #ifdef CONFIG_NAND_MXS
 #define CONFIG_SYS_FSL_USDHC_NUM	1
 #else
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #endif

 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
 #endif

 /* I2C configs */
 #define CONFIG_CMD_I2C
 #ifdef CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_SPEED		100000

 /* PMIC only for 9X9 EVK */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PFUZE3000
 #define CONFIG_POWER_PFUZE3000_I2C_ADDR  0x08
 #endif

 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1

 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
 	"console=ttymxc0\0" \
 	"fdt_high=0xffffffff\0" \
 	"initrd_high=0xffffffff\0" \
 	"fdt_file=undefined\0" \
 	"fdt_addr=0x83000000\0" \
 	"boot_fdt=try\0" \
 	"ip_dyn=yes\0" \
 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=${mmcroot}\0" \
 	"loadbootscript=" \
 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 	"bootscript=echo Running bootscript from mmc ...; " \
 		"source\0" \
 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 	"mmcboot=echo Booting from mmc ...; " \
 		"run mmcargs; " \
 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 			"if run loadfdt; then " \
 				"bootz ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"if test ${boot_fdt} = try; then " \
 					"bootz; " \
 				"else " \
 					"echo WARN: Cannot load the DT; " \
 				"fi; " \
 			"fi; " \
 		"else " \
 			"bootz; " \
 		"fi;\0" \
 	"netargs=setenv bootargs console=${console},${baudrate} " \
 		"root=/dev/nfs " \
 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 		"netboot=echo Booting from net ...; " \
 		"run netargs; " \
 		"if test ${ip_dyn} = yes; then " \
 			"setenv get_cmd dhcp; " \
 		"else " \
 			"setenv get_cmd tftp; " \
 		"fi; " \
 		"${get_cmd} ${image}; " \
 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 				"bootz ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"if test ${boot_fdt} = try; then " \
 					"bootz; " \
 				"else " \
 					"echo WARN: Cannot load the DT; " \
 				"fi; " \
 			"fi; " \
 		"else " \
 			"bootz; " \
 		"fi;\0" \
 		"findfdt="\
 			"if test $fdt_file = undefined; then " \
 				"if test $board_name = EVK && test $board_rev = 9X9; then " \
 					"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
 				"if test $board_name = EVK && test $board_rev = 14X14; then " \
 					"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
 				"if test $fdt_file = undefined; then " \
 					"echo WARNING: Could not determine dtb to use; fi; " \
 			"fi;\0" \

 #define CONFIG_BOOTCOMMAND \
 	   "run findfdt;" \
 	   "mmc dev ${mmcdev};" \
 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
 		   "if run loadbootscript; then " \
 			   "run bootscript; " \
 		   "else " \
 			   "if run loadimage; then " \
 				   "run mmcboot; " \
 			   "else run netboot; " \
 			   "fi; " \
 		   "fi; " \
 	   "else run netboot; fi"

 /* Miscellaneous configurable options */
 #define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START	0x80000000
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)

 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000

 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_STACKSIZE		SZ_128K

 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

 #define CONFIG_SYS_INIT_SP_OFFSET \
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH

 #define CONFIG_ENV_SIZE			SZ_8K
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
 #define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */

 #define CONFIG_OF_LIBFDT
 #define CONFIG_CMD_BOOTZ
 #define CONFIG_CMD_BMODE

 #ifndef CONFIG_SYS_DCACHE_OFF
 #define CONFIG_CMD_CACHE
 #endif

 #define CONFIG_FSL_QSPI
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_BAR
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
 #define CONFIG_SF_DEFAULT_SPEED	40000000
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #define CONFIG_SPI_FLASH_STMICRO
 #define FSL_QSPI_FLASH_NUM		1
 #define FSL_QSPI_FLASH_SIZE		SZ_32M
 #endif

 /* USB Configs */
 #define CONFIG_CMD_USB
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MX6
 #define CONFIG_USB_STORAGE
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 #endif

 #ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define CONFIG_FEC_ENET_DEV		1

 #if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x2
 #define CONFIG_FEC_XCV_TYPE             RMII
 #elif (CONFIG_FEC_ENET_DEV == 1)
 #define IMX_FEC_BASE			ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR		0x1
 #define CONFIG_FEC_XCV_TYPE		RMII
 #endif
 #define CONFIG_ETHPRIME			"FEC"

 #define CONFIG_PHYLIB
 #define CONFIG_PHY_MICREL
 #endif

 #define CONFIG_IMX_THERMAL

 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_VIDEO
 #ifdef CONFIG_VIDEO
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VIDEO_MXS
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_SPLASH_SCREEN_ALIGN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
 #define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
 #endif
 #endif

 #endif
	/*
	* Copyright (C) 2015 Freescale Semiconductor, Inc.
	*
	* Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
	*
	* SPDX-License-Identifier: GPL-2.0+
	*/
	#ifndef __MX6UL_14X14_EVK_CONFIG_H
	#define __MX6UL_14X14_EVK_CONFIG_H


	#include <asm/arch/imx-regs.h>
	#include <linux/sizes.h>
	#include "mx6_common.h"
	#include <asm/imx-common/gpio.h>

	#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)

	/* SPL options */
	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	#define CONFIG_SPL_MMC_SUPPORT
	#include "imx6_spl.h"

	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

	#define CONFIG_DISPLAY_CPUINFO
	#define CONFIG_DISPLAY_BOARDINFO

	/* Size of malloc() pool */
	#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)

	#define CONFIG_BOARD_EARLY_INIT_F
	#define CONFIG_BOARD_LATE_INIT

	#define CONFIG_MXC_UART
	#define CONFIG_MXC_UART_BASE UART1_BASE

	/* MMC Configs */
	#ifdef CONFIG_FSL_USDHC
	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR

	/* NAND pin conflicts with usdhc2 */
	#ifdef CONFIG_NAND_MXS
	#define CONFIG_SYS_FSL_USDHC_NUM 1
	#else
	#define CONFIG_SYS_FSL_USDHC_NUM 2
	#endif

	#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
	#endif

	/* I2C configs */
	#define CONFIG_CMD_I2C
	#ifdef CONFIG_CMD_I2C
	#define CONFIG_SYS_I2C
	#define CONFIG_SYS_I2C_MXC
	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	#define CONFIG_SYS_I2C_SPEED 100000

	/* PMIC only for 9X9 EVK */
	#define CONFIG_POWER
	#define CONFIG_POWER_I2C
	#define CONFIG_POWER_PFUZE3000
	#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
	#endif

	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1

	#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=undefined\0" \
	"fdt_addr=0x83000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	"root=${mmcroot}\0" \
	"loadbootscript=" \
	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
	"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
	"run mmcargs; " \
	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	"if run loadfdt; then " \
	"bootz ${loadaddr} - ${fdt_addr}; " \
	"else " \
	"if test ${boot_fdt} = try; then " \
	"bootz; " \
	"else " \
	"echo WARN: Cannot load the DT; " \
	"fi; " \
	"fi; " \
	"else " \
	"bootz; " \
	"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
	"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
	"run netargs; " \
	"if test ${ip_dyn} = yes; then " \
	"setenv get_cmd dhcp; " \
	"else " \
	"setenv get_cmd tftp; " \
	"fi; " \
	"${get_cmd} ${image}; " \
	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	"bootz ${loadaddr} - ${fdt_addr}; " \
	"else " \
	"if test ${boot_fdt} = try; then " \
	"bootz; " \
	"else " \
	"echo WARN: Cannot load the DT; " \
	"fi; " \
	"fi; " \
	"else " \
	"bootz; " \
	"fi;\0" \
	"findfdt="\
	"if test $fdt_file = undefined; then " \
	"if test $board_name = EVK && test $board_rev = 9X9; then " \
	"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
	"if test $board_name = EVK && test $board_rev = 14X14; then " \
	"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
	"if test $fdt_file = undefined; then " \
	"echo WARNING: Could not determine dtb to use; fi; " \
	"fi;\0" \

	#define CONFIG_BOOTCOMMAND \
	"run findfdt;" \
	"mmc dev ${mmcdev};" \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
	"if run loadbootscript; then " \
	"run bootscript; " \
	"else " \
	"if run loadimage; then " \
	"run mmcboot; " \
	"else run netboot; " \
	"fi; " \
	"fi; " \
	"else run netboot; fi"

	/* Miscellaneous configurable options */
	#define CONFIG_CMD_MEMTEST
	#define CONFIG_SYS_MEMTEST_START 0x80000000
	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)

	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	#define CONFIG_SYS_HZ 1000

	#define CONFIG_CMDLINE_EDITING
	#define CONFIG_STACKSIZE SZ_128K

	/* Physical Memory Map */
	#define CONFIG_NR_DRAM_BANKS 1
	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR

	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE

	#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

	/* FLASH and environment organization */
	#define CONFIG_SYS_NO_FLASH

	#define CONFIG_ENV_SIZE SZ_8K
	#define CONFIG_ENV_IS_IN_MMC
	#define CONFIG_ENV_OFFSET (8 * SZ_64K)
	#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
	#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
	#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */

	#define CONFIG_OF_LIBFDT
	#define CONFIG_CMD_BOOTZ
	#define CONFIG_CMD_BMODE

	#ifndef CONFIG_SYS_DCACHE_OFF
	#define CONFIG_CMD_CACHE
	#endif

	#define CONFIG_FSL_QSPI
	#ifdef CONFIG_FSL_QSPI
	#define CONFIG_CMD_SF
	#define CONFIG_SPI_FLASH
	#define CONFIG_SPI_FLASH_BAR
	#define CONFIG_SF_DEFAULT_BUS 0
	#define CONFIG_SF_DEFAULT_CS 0
	#define CONFIG_SF_DEFAULT_SPEED 40000000
	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	#define CONFIG_SPI_FLASH_STMICRO
	#define FSL_QSPI_FLASH_NUM 1
	#define FSL_QSPI_FLASH_SIZE SZ_32M
	#endif

	/* USB Configs */
	#define CONFIG_CMD_USB
	#ifdef CONFIG_CMD_USB
	#define CONFIG_USB_EHCI
	#define CONFIG_USB_EHCI_MX6
	#define CONFIG_USB_STORAGE
	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	#define CONFIG_MXC_USB_FLAGS 0
	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	#endif

	#ifdef CONFIG_CMD_NET
	#define CONFIG_FEC_MXC
	#define CONFIG_MII
	#define CONFIG_FEC_ENET_DEV 1

	#if (CONFIG_FEC_ENET_DEV == 0)
	#define IMX_FEC_BASE ENET_BASE_ADDR
	#define CONFIG_FEC_MXC_PHYADDR 0x2
	#define CONFIG_FEC_XCV_TYPE RMII
	#elif (CONFIG_FEC_ENET_DEV == 1)
	#define IMX_FEC_BASE ENET2_BASE_ADDR
	#define CONFIG_FEC_MXC_PHYADDR 0x1
	#define CONFIG_FEC_XCV_TYPE RMII
	#endif
	#define CONFIG_ETHPRIME "FEC"

	#define CONFIG_PHYLIB
	#define CONFIG_PHY_MICREL
	#endif

	#define CONFIG_IMX_THERMAL

	#ifndef CONFIG_SPL_BUILD
	#define CONFIG_VIDEO
	#ifdef CONFIG_VIDEO
	#define CONFIG_CFB_CONSOLE
	#define CONFIG_VIDEO_MXS
	#define CONFIG_VIDEO_LOGO
	#define CONFIG_VIDEO_SW_CURSOR
	#define CONFIG_VGA_AS_SINGLE_DEVICE
	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	#define CONFIG_SPLASH_SCREEN
	#define CONFIG_SPLASH_SCREEN_ALIGN
	#define CONFIG_CMD_BMP
	#define CONFIG_BMP_16BPP
	#define CONFIG_VIDEO_BMP_RLE8
	#define CONFIG_VIDEO_BMP_LOGO
	#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
	#endif
	#endif

	#endif