arch/arm/dts/qcs404-evb.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * Qualcomm QCS404 based evaluation board device tree source
 *
 * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "qcs404.dtsi"
#include "pms405.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

/ {
	model = "Qualcomm Technologies, Inc. QCS404 EVB";
	compatible = "qcom,qcs404-evb", "qcom,qcs404";
	#address-cells = <0x2>;
	#size-cells = <0x2>;

	aliases {
		serial0 = &blsp1_uart2;
		serial1 = &blsp1_uart3;
	};

	chosen {
		stdout-path = "serial0";
	};

	usb3_vbus_reg: regulator-usb3-vbus {
		compatible = "regulator-gpio";
		regulator-name = "VBUS_BOOST_5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-gpios = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>;
		states = <0 0>, <1800000 1>;
		enable-active-high;

		/* TODO: Drop this when introducing role switching */
		regulator-always-on;
	};
};

&blsp1_i2c0 {
	status = "okay";
};

&blsp1_i2c1 {
	status = "okay";
};

&blsp1_i2c2 {
	status = "okay";
};

&blsp1_i2c3 {
	status = "okay";
};

&blsp1_i2c4 {
	status = "okay";
};

&ethernet {
	status = "okay";

	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
	snps,reset-active-low;
	snps,reset-delays-us = <0 10000 10000>;

	phy-handle = <&phy1>;
	phy-mode = "rgmii";
	mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy1: phy@4 {
			compatible = "ethernet-phy-ieee802.3-c22";
			device_type = "ethernet-phy";
			reg = <0x4>;
		};
	};
};

&sdcc1 {
	status = "okay";

	supports-cqe;
	mmc-ddr-1_8v;
	mmc-hs400-1_8v;
	bus-width = <8>;
	non-removable;
};

&usb2 {
	status = "okay";
};

&usb2_phy_sec {
	status = "okay";
};

&usb3 {
	status = "okay";

};

&usb3_dwc3 {
	dr_mode = "host";

	vbus-supply = <&usb3_vbus_reg>;
};

&usb2_phy_prim {
	status = "okay";
};

&usb3_phy {
	status = "okay";
};