blob: 6b03e7405afab878ef6e457f843cdcc7058989c4 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Toradex Verdin AM62 dts file for R5 SPL
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "k3-am625-verdin-wifi-dev.dts"
#include "k3-am625-verdin-lpddr4-1600MTs.dtsi"
#include "k3-am62-ddr.dtsi"
#include "k3-am625-verdin-wifi-dev-u-boot.dtsi"
/ {
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
/*
* FIXME: Currently only the SPL running on the R5 has a clock
* driver. As a workaround therefore move the assigned-clock
* stuff required for our ETH_25MHz_CLK from the cpsw3g_mdio
* node of the regular device tree to here (last one each in
* below three lines, adding a <0> as spacing for parents).
*/
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 20>;
assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 22>;
assigned-clock-rates = <200000000>, <1000000000>, <25000000>;
clocks = <&k3_clks 61 0>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
ti,sci = <&dmsc>;
ti,sci-host-id = <10>;
ti,sci-proc-id = <32>;
bootph-pre-ram;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
ti,host-id = <36>;
ti,secure-host;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};