| /* |
| * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
| * |
| * Configuation settings for the AFEB9260 board. |
| * Based on configuration for AT91SAM9260-EK |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| /* ARM asynchronous clock */ |
| #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ |
| #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ |
| #define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ |
| #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ |
| |
| #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| |
| #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ |
| #define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */ |
| #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| |
| #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| #define CONFIG_SETUP_MEMORY_TAGS 1 |
| #define CONFIG_INITRD_TAG 1 |
| |
| #define CONFIG_SKIP_LOWLEVEL_INIT |
| #define CONFIG_SKIP_RELOCATE_UBOOT |
| |
| /* |
| * Hardware drivers |
| */ |
| #define CONFIG_ATMEL_USART 1 |
| #undef CONFIG_USART0 |
| #undef CONFIG_USART1 |
| #undef CONFIG_USART2 |
| #define CONFIG_USART3 1 /* USART 3 is DBGU */ |
| |
| #define CONFIG_BOOTDELAY 3 |
| |
| /* |
| * BOOTP options |
| */ |
| #define CONFIG_BOOTP_BOOTFILESIZE 1 |
| #define CONFIG_BOOTP_BOOTPATH 1 |
| #define CONFIG_BOOTP_GATEWAY 1 |
| #define CONFIG_BOOTP_HOSTNAME 1 |
| |
| /* |
| * Command line configuration. |
| */ |
| #include <config_cmd_default.h> |
| #undef CONFIG_CMD_BDI |
| #undef CONFIG_CMD_FPGA |
| #undef CONFIG_CMD_IMI |
| #undef CONFIG_CMD_IMLS |
| #undef CONFIG_CMD_LOADS |
| #undef CONFIG_CMD_SOURCE |
| |
| #define CONFIG_CMD_PING 1 |
| #define CONFIG_CMD_DHCP 1 |
| |
| #define CONFIG_CMD_NAND 1 |
| #define CONFIG_CMD_USB 1 |
| |
| /* SDRAM */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define PHYS_SDRAM 0x20000000 |
| #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
| |
| /* DataFlash */ |
| #define CONFIG_ATMEL_DATAFLASH_SPI |
| #define CONFIG_HAS_DATAFLASH 1 |
| #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
| #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
| #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ |
| #define AT91_SPI_CLK 15000000 |
| #define DATAFLASH_TCSS (0x1a << 16) |
| #define DATAFLASH_TCHS (0x1 << 24) |
| |
| /* NAND flash */ |
| #ifdef CONFIG_CMD_NAND |
| #define CONFIG_NAND_ATMEL |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| #define CONFIG_SYS_NAND_BASE 0x40000000 |
| #define CONFIG_SYS_NAND_DBW_8 1 |
| /* our ALE is AD21 */ |
| #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| /* our CLE is AD22 */ |
| #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
| #endif |
| |
| /* NOR flash - no real flash on this board */ |
| #define CONFIG_SYS_NO_FLASH 1 |
| |
| /* Ethernet */ |
| #define CONFIG_MACB 1 |
| #undef CONFIG_RMII /* We have full MII there */ |
| #define CONFIG_RESET_PHY_R 1 |
| |
| #define CONFIG_NET_MULTI 1 |
| #define CONFIG_NET_RETRY_COUNT 20 |
| |
| /* USB */ |
| #define CONFIG_USB_ATMEL |
| #define CONFIG_USB_OHCI_NEW 1 |
| #define CONFIG_DOS_PARTITION 1 |
| #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
| #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
| #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
| #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
| #define CONFIG_USB_STORAGE 1 |
| |
| #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ |
| |
| #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
| #define CONFIG_SYS_MEMTEST_END 0x21e00000 |
| |
| #undef CONFIG_SYS_USE_DATAFLASH_CS0 |
| #define CONFIG_SYS_USE_DATAFLASH_CS1 1 |
| #undef CONFIG_SYS_USE_NANDFLASH |
| |
| /* bootstrap + u-boot + env + linux in dataflash on CS1 */ |
| #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
| #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
| #define CONFIG_ENV_OFFSET 0x4200 |
| #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
| #define CONFIG_ENV_SIZE 0x4200 |
| #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" |
| #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| "root=/dev/mtdblock2 " \ |
| "rw rootfstype=jffs2 panic=20" |
| |
| #define CONFIG_BAUDRATE 115200 |
| #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| |
| #define CONFIG_SYS_PROMPT "U-Boot> " |
| #define CONFIG_SYS_CBSIZE 256 |
| #define CONFIG_SYS_MAXARGS 16 |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| #define CONFIG_SYS_LONGHELP 1 |
| #define CONFIG_CMDLINE_EDITING 1 |
| |
| #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) |
| /* |
| * Size of malloc() pool |
| */ |
| #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
| #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ |
| |
| #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
| |
| #ifdef CONFIG_USE_IRQ |
| #error CONFIG_USE_IRQ not supported |
| #endif |
| |
| #endif |