serial: serial_stm32: Enable overrun
Enable uart overrun feature which allows to benefits of uart
FIFO usage.
Previously overrun management was disabled, this has to effect
to bypassed the uart FIFO usage even if FIFO was enabled.
In particular configuration, for example when video console is
enabled, copy/pasting a long command line in console results in
corruption. This is due to the fact that a lot of time is consumed
in flushing the cache during frame buffer update, so uart chars are
not read fast enough.
By using uart FIFO and managing overrun, long command line can by
copy/paste in console without being corrupted.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index dfef0d4..e2eeade 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -43,10 +43,19 @@
struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
bool stm32f4 = plat->uart_info->stm32f4;
fdt_addr_t base = plat->base;
+ u32 isr = readl(base + ISR_OFFSET(stm32f4));
- if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
+ if ((isr & USART_SR_FLAG_RXNE) == 0)
return -EAGAIN;
+ if (isr & USART_SR_FLAG_ORE) {
+ if (!stm32f4)
+ setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
+ else
+ readl(base + RDR_OFFSET(stm32f4));
+ return -EIO;
+ }
+
return readl(base + RDR_OFFSET(stm32f4));
}
@@ -107,11 +116,9 @@
return plat->clock_rate;
};
- /* Disable uart-> disable overrun-> enable uart */
+ /* Disable uart-> enable fifo-> enable uart */
clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
BIT(uart_enable_bit));
- if (plat->uart_info->has_overrun_disable)
- setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
if (plat->uart_info->has_fifo)
setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |